Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers
ID | Date | Version | Classification |
---|---|---|---|
834819 | 01/29/2025 | 001 | Public |
BIOS Direct Read DMA Status (BIOS_RD_DMA_STS) – Offset c0
This register contains status for receive DMA
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:16 | 0h | RO/V | SPI BIOS DMA Write Pointer (SPI_BIOS_RD_DMA_WRPTR) DMA HW increments the DMA write pointer when it writes every 1KB data to the buffer in the master's RAM. |
15:8 | 0h | RO | Reserved (RSVD_8_15) Reserved |
7 | 0h | RW/1C/V | Access Error Log (SPI_BIOS_RD_DMA_AEL) Hardware sets this bit to a 1 when an attempt was made to access the BIOS region using the direct access method or an access to the BIOS Program Registers that violated the security restrictions. This bit is simply a log of an access security violation. This bit is cleared by software writing a '1'. |
6 | 0h | RW/1C/V | SAF Data length Error (SPI_BIOS_RD_DMA_SAF_DLE) Hardware sets this bit to 1 when a transaction is returned from the eSPI channel with an incorrect data length. |
5 | 0h | RW/1C/V | SAF link Error (SPI_BIOS_RD_DMA_SAF_LE) Hardware sets this bit to 1 when a transaction is returned from the eSPI channel with link error. |
4 | 0h | RW/1C/V | SAF ctype error (SPI_BIOS_RD_DMA_SAF_CE) Hardware sets this bit to 1 when a transaction is returned from the eSPI controller with ctype error. |
3 | 0h | RW/1C/V | SPI BIOS Read DMA Error (SPI_BIOS_RD_DMA_ERR) An error was encountered during a read DMA operation. |
2 | 0h | RW/1C/V | RX DMA Complete (SPI_BIOS_RD_DMA_CPL) This bit is set when DMA Start is set and the total size of DMA has been completed. |
1:0 | 0h | RO | Reserved (RSVD) Reserved |