Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers
ID | Date | Version | Classification |
---|---|---|---|
834819 | 01/29/2025 | 001 | Public |
Discrete Lock Bits (BIOS_DLOCK) – Offset c
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:17 | 0h | RO | Reserved (RSVD)
|
16 | 0h | RW/L | SSEQ Lock-Down (SSEQLOCKDN) BIOS Software Sequencing registers are locked when the logical OR of this bit and FLOCKDN is true. The affected registers are SSFSTS_CTL.SCF, PREOP_OPTYPE, OPMENU0, and OPMENU1. Once set to 1 this register is only cleared by host partition reset. |
15 | 0h | RW/L | RPMC OP code Lock-Down (RPMC_OP_LOCK) BIOS_RPMC[0,1]_D[0,1] registers are locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
14:13 | 0h | RO | Reserved |
12 | 0h | RW/L | PR4 Lock-Down (PR4LOCKDN) BIOS PR4 register is locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
11 | 0h | RW/L | PR3 Lock-Down (PR3LOCKDN) BIOS PR3 register is locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
10 | 0h | RW/L | PR2 Lock-Down (PR2LOCKDN) BIOS PR2 register is locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
9 | 0h | RW/L | PR1 Lock-Down (PR1LOCKDN) BIOS PR1 register is locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
8 | 0h | RW/L | PR0 Lock-Down (PR0LOCKDN) BIOS PR0 register is locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by BIOS partition reset. |
7:4 | 0h | RO | Reserved |
3 | 0h | RW/L | SBMRAG Lock-Down (SBMRAGLOCKDN) BIOS SFRACC.BMRAG register bits are locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by host partition reset. |
2 | 0h | RW/L | SBMWAG Lock-Down (SBMWAGLOCKDN) BIOS SFRACC.BMWAG register bits are locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by host partition reset. |
1 | 0h | RW/L | BMRAG Lock-Down (BMRAGLOCKDN) BIOS FRACC.BMRAG register bits are locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by host partition reset. |
0 | 0h | RW/L | BMWAG Lock-Down (BMWAGLOCKDN) BIOS FRACC.BMWAG register bits are locked when the logical OR of this bit and FLOCKDN is true. Once set to 1 this register is only cleared by host partition reset. |