31:19

0h

RO

Reserved (RSVD)

Reserved

18

1h

RO/V

SAF CAM Empty (SAFCAMEMPTY)

Only valid in Device-attached flash mode. Has no impact otherwise.
1: the flash channel will be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.
0: the flash channel will NOT be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.

17

0h

RW/1C/V

SAF Blocked (SAFBLK)

Only valid in Device-attached flash mode. Has no impact otherwise.
1: the flash channel will be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.
0: the flash channel will NOT be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.

16

0h

RW

SAF NF Error Blocking Enable (SAFNFEBLKEN)

Only valid in Device-attached flash mode. Has no impact otherwise.
1: the flash channel will be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.
0: the flash channel will NOT be blocked when a NON_​FATAL_​ERROR response is received in response to a GET_​FLASH_​C.

15

0h

RO

Reserved (RSVD1)

Reserved

14:13

0h

RW

Flash Access Channel Non-Fatal Error Reporting Enable (FCNFEE)

2'b00: Disable Non-Fatal Error Reporting
2'b01: Reserved
2'b10: Enable Non-Fatal Error Reporting as SERR (IOSF-SB Do_​SErr message)
2'b11: Enable Non-Fatal Error Reporting as SMI (IOSF-SB Assert_​SMI message)
Notes:
- SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# is deasserted.
- SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted.
- SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted).

12

0h

RW/1C/V

Flash Access Channel Non-Fatal Error Status (FCNFES)

This field is set by hardware if a Non-Fatal Error condition is detected on the Flash Access Channel. Software must clear this bit.
1'b0: No Non-Fatal Error detected
1'b1: Non-Fatal Error detected (FCNFEC has a non-zero value)
Notes:
- Clearing this unlocks the FCNFEC field and triggers an IOSF-SB Deassert_​SMI message if FCNFEE is set to SMI.
- Setting of this bit is independent of the enable to generate a SMI/SERR (FCNFEE).

11:8

0h

RO/V

Flash Access Channel Non-Fatal Error Cause (FCNFEC)

4'h0: No error
4'h1: Device Response Code: NONFATAL_​ERROR received in response to GET_​FLASH_​NP, PUT_​FLASH_​C (for Master-Attached Flash accesses only) or GET_​FLASH_​C (for Device-Attached Flash accesses only).
4'h2: Device Response Code: Unsuccessful Completion (for Device-Attached Flash accesses only)
4'h3: Unexpected completion received from Device (i.e. completion without non-posted request or completion with invalid tag or completion with invalid length) (for Device-Attached Flash accesses only)
4'h4: Unsupported Cycle Type (w.r.t. Command)
4'h5: Device Response Code: NONFATAL_​ERROR received in response to PUT_​FLASH_​NP (for Device-Attached Flash accesses only).
4'h6: Unsupported Address (i.e., address > Flash linear address range) (for Master-Attached Flash accesses only) set to Flash Access Error
4'h7: Reserved
4'h8-4'hF: Reserved
Note: This field is updated after a Flash Access Channel transaction is completed if the FCNFES bit is not set

7

1h

RW

Master Attached Flash Request Priority (MAFRP)

1'b0: MAF Completion Requests are highest priority
1'b1: MAF Non-posted Requests are highest priority

6:5

0h

RW

Flash Access Channel Fatal Error Reporting Enable (FCFEE)

2'b00: Disable Fatal Error Reporting
2'b01: Reserved
2'b10: Enable Fatal Error Reporting as SERR (IOSF-SB Do_​SErr message)
2'b11: Enable Fatal Error Reporting as SMI (IOSF-SB Assert_​SMI message)
Notes:
- SERR enable is also qualified by PCCMD.SEE (Offset 04h) when PLTRST# is deasserted.
- SERR also sets PCSTS.SSE (Offset 06h) when PLTRST# is deasserted.
- SMI/SERR messages are not generated if the Host is in reset (PLTRST# asserted).

4

0h

RW/1C/V

Flash Access Channel Fatal Error Status (FCFES)

This field is set by hardware if a Fatal Error condition is detected on the Flash Access Channel. Software must clear this bit by writing a 1 to it.
1'b0: No Fatal Error detected
1'b1: Fatal Error Type 2 detected (FCFEC has a non-zero value)
Notes:
- Clearing this unlocks the FCFEC field and triggers an IOSF-SB Deassert_​SMI message if FCFEE is set to SMI.
- Setting of this bit is independent of the enable to generate a SMI/SERR (FCFEE).

3:0

0h

RO/V

Flash Access Channel Fatal Error Cause (FCFEC)

4'h0: No error
4'h1-4'h7: Reserved
4'h8: Malformed Device Response Payload: Payload length > Max Payload Size [Type 2]
4'h9: Malformed Device Response Payload: Read request size > Max Read Request Size [for Master-Attached Flash accesses only] [Type 2]
4'hA-4'hF: Reserved
Note: This field is updated after a Flash Access Channel transaction is completed if the FCFES bit is not set.