Main Counter Value (MAIN_CNTR) – Offset f0 - 001 - ID:834819 | Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers

Software can read the various bytes in this register using 32-bit or 64-bit accesses.
32-bit accesses may only be done to offset 0F0h or 0F4h. 64-bit accesses may only be
done to 0F0h.
Writes to this register should only be done while the counter is halted.
Reads to this register return the current value of the main counter. If 32-bit software
attempts to read a 64-bit counter, it should first halt the counter. Since this will delay
the interrupts for all of the timers, this should be done only if the consequences are
understood. It is strongly recommended that 32-bit software only operate the timer in
32-bit mode.
Reads to this register are monotonic. No two consecutive reads will return the same
value. The second of two reads will always return a larger value (unless the timer has
rolled over to 0)

Bit Range	Default	Access	Field Name and Description
63:0	0h	RW/V	Counter Value (COUNTER_VAL) Reads return the current value of the counter. Writes load the new value to the counter.

Bit Range

Default

Access

Field Name and Description

63:0

RW/V

Counter Value (COUNTER_VAL)

Reads return the current value of the counter. Writes load the new value to the counter.

Timer 0 Config and Capabilities (TMR0_CNF_CAP)

General Interrupt Status Register (GEN_INT_STS) Timer 0 Config and Capabilities (TMR0_CNF_CAP)

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Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers

Main Counter Value (MAIN_CNTR) – Offset f0