31:12

0h

RO

Reserved (RSVD1)

Reserved

11:8

0h

RW

INTA-D Default Decoder PIR Mapping (INTDDPIR)

Specifies the PIR register to use for the INTA-D Default Docder state. PIR registers map INTA-D state to PRIQA-H. Any This value is only used when INTDDEN is set.


Acceptable values include any valid PIR register number (i.e. 0-12) or the value of 13. The value of 13, which behaves simular to the PIR direct connect source IDs, maps INTA to PIRQA, INTB maps to PIRQB, INTC maps to PIRQC and INTD maps to PIRQD and has no programable option to change it.

7:3

0h

RO

Reserved (RSVD2)

Reserved

2

0h

RW

NMI Default Decoder Enable (NMIDDEN)

When set, the NMI decode logic will accept ASSERT_​NMI/DEASSERT_​NMI messages from unknown sources (sources not specified with the NMI_​SRC_​ID and (if OPC_​ASRT/DSRTNMI == OPC_​ASRT/DASRTIOCHK which is the default case) IOCHK_​SRC_​ID parameters). When cleared, NMI mesages from unknown sources will be dropped.

1

0h

RW

INTAD Default Decoder Enable (INTDDEN)

When set, the INTA-D decoder logic will accepts ASSERT_​INTA-D/DEASSERT_​INTA-D messages from unknown sources (source not specified with the IPIR0-12_​SRC_​ID and PIRDC_​SRC_​ID parameters). When cleared, INTA-D messages from unknown sources will be dropped.

0

0h

RW

IRQN Default Decoder Enable (IRQDDEN)

When set, the IRQN decoder logic will accept ASSERT_​IRQN/DEASSERT_​IRQN messages from unknown source ( source not specified with the SIRQ_​SINGLE_​CAUSE_​SRC_​ID and SIRQ_​MULTI_​CAUSE_​SRC_​ID parameters). When cleared, IRQN messages from unknown sources will be dropped.