31:28

0h

RO

Reserved (RSVD_​0)

Reserved

27:24

0h

RO

Reserved

23

0h

RW

Pad Config Lock (PADCFGLOCK_​xxgpp_​sa_​23)

Same description as bit 14.

22

0h

RW

Pad Config Lock (PADCFGLOCK_​xxgpp_​sa_​22)

Same description as bit 14.

21:17

0h

RO

Reserved

16

0h

RW

Pad Config Lock (PADCFGLOCK_​xxgpp_​sa_​16)

Same description as bit 14.

15

0h

RW

Pad Config Lock (PADCFGLOCK_​xxgpp_​sa_​15)

Same description as bit 14.

14

0h

RW

Pad Config Lock (PADCFGLOCK_​xxgpp_​sa_​14)

Pad Configuration Lock locks specific register fields in the GPP specific registers from being configured. The registers affected become Read-Only and software writes to these registers have no effect.
This field takes effect only if the pad is owned by host (refer to PAD_​OWN register). Pads under other ownership are not affected by the PadCfgLock.
0 = Unlock
1 = Lock the following register fields as read-only (RO)
- Pad Configuration registers (exclude GPIOTXState)
- GPI_​NMI_​EN Register (if implemented)
- HOSTSW_​OWN Registers (if implemented)

13:0

0h

RO

Reserved