Read Back Command (RBC) – Offset 43 - 001 - ID:834819 | Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers

The Read Back Command is used to determine the count value, programmed mode, and current states of the OUT pin and Null count flag of the selected counter or counters. Status and/or count may be latched in any or all of the counters by selecting the counter during the register write. The count and status remain latched until read, and further latch commands are ignored until the count is read.

Both count and status of the selected counters may be latched simultaneously by setting both bit 5 and bit 4 to 0. If both are latched, the first read operation from that counter returns the latched status. The next one or two reads, depending on whether the counter is programmed for one or two byte counts, returns the latched count. Subsequent reads return an unlatched count.

Bit Range	Default	Access	Field Name and Description
7:6	3h	WO	Read Back Command (RBC) Must be 11 to select the Read Back Command
5	0h	WO	Latch Count of Selected Counters (LCSC) 0: Current count value of the selected counters will be latched 1: Current count will not be latched
4	0h	WO	Latch Status of Selected Counters (LSSC) 0: Status of the selected counters will be latched 1: Status will not be latched
3	0h	WO	Counter 2 Select (CNT_2_SLT) When set to 1, Counter 2 count and/or status will be latched
2	0h	RSV	Reserved (RSVD) Reserved
1	0h	WO	Counter 0 Select (CNT_0_SLT) When set to 1, Counter 0 count and/or status will be latched.
0	0h	RSV	Reserved (RSVD_1) Must be 0.

Counter Latch Command (CLC)

Timer Control Word Register (TCW) Counter Latch Command (CLC)

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Intel® Core™ Ultra 200S and 200HX Series Processors SOC I/O Registers

Read Back Command (RBC) – Offset 43