Intel® System Debugger User Guide

ID 648476
Date 06/13/2024
Confidential
Document Table of Contents

Create Rules

To work with rules, go to Project Explorer, double-click platform.json instance under your project node, and switch to the Setup Rules tab.

setup_rules_tab

To create a new rule, click add_buttonAdd Rule and select a rule type.

Editing and Rearranging Rules

When you create a new rule, you can interact with active fields to configure the rule appropriately.

By default, rules are ranged by ID (first column) and grouped by type (second column) but you can customize the layout as follows:

  • Drag and drop a rule to a new location within the given range.

  • Create a new rule group: press and hold Crtl, select rules, click group_buttonGroup, and enter a name for the new group. Be default, the group appears at the bottom of the table.

  • Do basic operations like enable/disable, copy/paste, or remove rules.

To save all edits, press Ctrl+S.

Rule Types

Digital Sequence Order (DSQ#) Rule

Signals 1 and 2 must sequence to the defined states within a specific time (minimum/maximum time difference) with signal 1 preceding signal 2.

Example

dsq_rule_example

dsq_rule_example_1

Digital State Order (DST#) Rule

A digital signal must be in a given state when another digital signal changes into a specific state.

Example

dst_rule_example

dst_rule_example_1

Digital Hard Order (DHO#) Rule

The given digital signals are expected to transition in the given order and no other digital signal is allowed to transition in between these signals, unless it is specified as an exempt signal.

Example

dho_rule_example

dho_rule_example_1

Digital Transition Count (DTC#) Rule

A digital signal is expected to transition a certain number of times. The allowed number of transitions can be a range of values. If specified, the initial and resulting states of the signal are also compared to the expected states.

Example

dtc_rule_example

dtc_rule_example_1

Analog Voltage Difference (AVD#) Rule

Two analog signals are expected to not exceed a given difference in voltage levels at any time.

Example

avd_rule_example

avd_rule_example_1

Analog Voltage Level (AVL#) Rule

An analog signal is expected to keep its low and high voltage levels within a given range and the duration of a transition under a certain amount of time. Also, the overshoot duration as well as voltage level is checked to not exceed given values.

Example

avl_rule_example

avl_rule_example_1