Intel® System Debugger User Guide

ID 648476
Date 06/13/2024
Confidential
Document Table of Contents

Enable Low Voltage Margining Overrides

During low power S0iX states, logic voltage is lowered (physical low power state). This causes limitations of the debug capabilities and requires a different debug interface than if the system stayed in the S0 power state. When the debug feature is using signal or power rail (which must be off for low power states), hardware blocks low power assertion.

To maintain the debug connection and allow the target to enter low power state, LVM (logical low power states) are introduced. Low Voltage Margining (LVM) overrides is a setting that disables lower voltage requirement and allows the debugger to achieve simulated (logical low power) states and keep debug connection running and active.

Note:

If a platform does not have LVM setting, this configuration is not supported.

To change LVM overrides, go to the Platform Configuration menu and check the Apply low power overrides box. Trace profiles that are applicable for low power have this setting enabled by default.

survivability_mode