IDV Tool Hardware Overview

Intelligent Debug & Validation Tool (IDV Tool) setup contains a hardware asset and a software application with GUI. This page provides an overview of the hardware element and interacting with software is covered in other topics.

The IDV Tool hardware is a 32-channel mixed signal oscilloscope and logic analyzer with integrated rule checking. Four LEDs expose the tool operational status.

The setup contains the following elements:

1. 32 signals can be assigned to any header pin as an input (0 to 4.6v max)

2. 32 pins are captured through both digital and analog paths at same time

3. 32 digital transceivers are configured to unique TTL/CMOS voltage thresholds. This is done by the rule kit downloaded to the tool.

4. 32 analog channels are converted to digital using 2 SPI based 10-bit ADCs

5. 63 extra signals can be received serially and captured via 4 SGPIO pins. SGPIO is supported by an increasing number of new Intel(R) platforms.

6. All digital/analog changes are timestamped by FPGA and sent to IDV Tool software via the USB2 interface.

7. IDV Tool hardware supports field FPGA design updates using SW Remote System Update. This allows you to quickly upgrade your IDV Tool hardware with new features under the direct control of IDV Tool software. No JTAG tools are required to accomplish this.

Digital captures occur at 10ns per sample only if logic-levels change. Digital captures are processed by 4 digital rules.

Analog captures occur at 1us per 10-bit sample only if the voltage-levels change. Analog captures are processed by 2 analog rules.