Intel® Core™ Ultra Processors for H-series and U-series Platforms IOE-P I/O Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 795262 | 12/14/2023 | 001 | Public |
Memory Base Address (MBAR) – Offset 10
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 63:16 | 0h | RW | Base Address (BA) Bits (63:16) correspond to memory address signals (63:16), respectively. This gives 64 KB of relocatable memory space aligned to 64 KB boundaries. |
| 15:4 | 0h | RO | Reserved |
| 3 | 0h | RO | Prefetchable Indication (PREFETCHABLE) This bit is hardwired to 0 indicating that this range should not be prefetched. |
| 2:1 | 2h | RO | Type Indication (MBAR_TYPE) If this field is hardwired to 00 it indicates that this range can be mapped anywhere within 32-bit address space. |
| 0 | 0h | RO | Resource Type Indicator (RTE) This bit is hardwired to 0 indicating that the base address field in this register maps to memory space |