Pad Configuration Lock GPIO TxState Register (PADCFGLOCKTX_GPP_B_0) – Offset 114 - 001 - ID:795260 | Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers

Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers

ID	Date	Version	Classification
795260	12/14/2023	001	Public

Pad Configuration Lock GPIO TxState Register (PADCFGLOCKTX_GPP_B_0) – Offset 114

Bit Range	Default	Access	Field Name and Description
31:25	0h	RO	Reserved (RSVD_0)
24	0h	RO	Reserved
23	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_23) Same description as bit 0
22	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_22) Same description as bit 0
21	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_21) Same description as bit 0
20	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_20) Same description as bit 0
19	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_19) Same description as bit 0
18	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_18) Same description as bit 0
17	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_17) Same description as bit 0
16	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_16) Same description as bit 0
15	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_15) Same description as bit 0
14	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_14) Same description as bit 0
13	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_13) Same description as bit 0
12	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_12) Same description as bit 0
11	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_11) Same description as bit 0
10	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_10) Same description as bit 0
9	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_9) Same description as bit 0
8	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_8) Same description as bit 0
7	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_7) Same description as bit 0
6	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_6) Same description as bit 0
5	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_5) Same description as bit 0
4	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_4) Same description as bit 0
3	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_3) Same description as bit 0
2	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_2) Same description as bit 0
1	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_1) Same description as bit 0
0	0h	RW	Pad Config Lock TXState (PADCFGLOCKTX_xxgpp_b_0) PadCfgLockTx locks the GPIOTxState bit from being configured. The GPIOTxState register becomes Read-Only and software writes to the register have no effect. This field takes effect only if the pad is owned by host (refer to PAD_OWN register). Pads under other ownership are not affected by the PadCfgLock. 0 = Unlock 1 = Locks the Pad Configuration GPIOTXState field as read-only (RO)