Device Idle Pointer Register (THC_CFG_DEVIDLEPTR) – Offset 9c - 001 - ID:834576 | Intel® 800 Series Chipset Family Platform Controller Hub (PCH), Volume 2

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- Device Idle Control Register (THC_M_CMN_DEVIDLECTRL)
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Device Idle Pointer Register (THC_CFG_DEVIDLEPTR) – Offset 9c

Bit Range	Default	Access	Field Name and Description
31:4	10h	RW/O	DevIdle MMIO Offset Location (DEVIDLELOC) This register contains the location pointer to the DevIdle register in MMIO space, as an offset from the specified BAR. The value of this register is a dont care, if the Valid bit is not set.
3:1	0h	RO	Base Address Register Number (BARNUM) Contains the 0s based BAR Number of the BAR which contains the location of the DevIdle MMIO register. When counting BAR Numbers, all BARs, regardless of size and type, consume one BAR Number. Bar 0 is the 1st BAR. The value of this register is a dont care, if the Valid bit is not set.
0	1h	RW/O	DevIdle Register Valid (VALID) Set to 1 to indicate that the function has implemented a DevIdle register as specified in the DevIdle that can be located using the DEVIDLELOC register and BARNUM. Set to 0 to indicate that the function has not implemented a DevIdle register that is compliant to the DevIdle definition. This could be because the function has not implemented DevIdle at all, or has a device specific version of DevIdle.

Bit Range

Default

Access

Field Name and Description

31:4

10h

RW/O

DevIdle MMIO Offset Location (DEVIDLELOC)

This register contains the location pointer to the DevIdle register in MMIO space, as an offset from the specified BAR.
The value of this register is a dont care, if the Valid bit is not set.

3:1

Base Address Register Number (BARNUM)

Contains the 0s based BAR Number of the BAR which contains the location of the DevIdle MMIO register.
When counting BAR Numbers, all BARs, regardless of size and type, consume one BAR Number. Bar 0 is the 1st BAR.
The value of this register is a dont care, if the Valid bit is not set.

RW/O

DevIdle Register Valid (VALID)

Set to 1 to indicate that the function has implemented a DevIdle register as specified in the DevIdle that can be located using the DEVIDLELOC register and BARNUM.
Set to 0 to indicate that the function has not implemented a DevIdle register that is compliant to the DevIdle definition. This could be because the function has not implemented DevIdle at all, or has a device specific version of DevIdle.

Device Idle Power On Latency (THC_CFG_DEVIDLEPOL)

SW LTR Pointer Regsiter (THC_CFG_SWLTRPTR) Device Idle Power On Latency (THC_CFG_DEVIDLEPOL)