S :

UDIMM 3200

S:

SoDIMM 3200

S :

UDIMM 3200

S

SoDIMM:

1R: 5200

2R: 5200

S :

UDIMM

1R: 5600

2R: 5200

S UDIMM :

1 DIMM - 4400

2 DIMMs 1R - 4000

2 DIMMs 2R - 3600

VDDQ [V] ⁵

1.2

5,1.1⁸

VDD2 [V] ⁵

1.2

1.1

Maximum RPC ²

Die Density [Gb]

Notes:

1. 1DPC refer to system with one DIMM slot routed per 64-bit channel, 2DPC refer to system with two DIMM slots routed per 64-bit channel.
2. RPC = Rank Per Channel.
3. Memory down of all technologies should be implemented homogeneous means that all DRAM devices should be from the same vendor and have the same part number. Implementing a mix of DRAM devices may cause serious signal integrity and functional issues.
4. There is no support for memory modules with different technologies or capacities on opposite sides of the same memory module. If one side of a memory module is populated, the other side is either identical or empty.
5. VDD2 is Processor DRAM voltage; VDDQ is DRAM voltage.

6. Maximum 2DPC frequency supported when same DIMM part number populated Within channel. Frequency is not guaranteed when mix DIMM's populated.

7. DDR5 5V is SODIMM/UDIMM voltage, 1.1V is Memory down voltage.
8. DDR4/DDR5 SoDIMM 2DPC Is not POR for S-Processor Line.
9. IL/NIL mode depends on Memory topology.

10. Far memory slot to be populated, in case, single DIMM is placed on 2DPC channel.

11. DDR4/DDR5 ECC is supported only when all populated memory modules in system are support ECC, ECC supported by specific S-Processor Line SKUs.

12. DDR5 top speed enabled with specific DIMMs, other DIMMs may operate with one speed bin lower and different SAGV points.

13. DDR5 24Gb die enablement is pending DIMM availability and ecosystem readiness, target post TTM.
14. S-DDR5 8+8+1/6+0+1 follow Gen 12 DDR5 speeds

DDR4

UDIMM

288

S - Processor

DDR4

SoDIMM

260

S - Processor

DDR5

SoDIMM

262

S - Processor

DDR5

UDIMM

288

S - Processor