Intel® TXT Policy Data Record (Type 0x0A) Rules

There can be zero or one Intel® TXT Configuration Policy Record in the FIT.

1. If there are zero records of this type Intel® TXT state defaults to be in ENABLED state. In other words, this record needs to be provided only, if OEM needs to offer Intel® TXT configuration disable feature without changing any bits in FIT, FIT pointer and/or BIOS ACM.
2. Each Type 0x0A entry in an address that is accessible by the processor at reset vector.
3. The address field contains the TXT_​CONFIG_​POLICY_​PTR structure. This structure contains the address, where the TXT Configuration Policy information resides. (Refer section 4.9.1)
4. The version field is set to 0, if TXT_​CONFIG_​POLICY_​PTR describes an Indexed IO type pointer. The version field is set to 1, if TXT_​CONFIG_​POLICY_​PTR describes a flat memory pointer.
5. If indexed IO type pointer is used, the Address field holds a structure of the type INDEX_​IO_​ADDRESS. This structure contains the IO addresses of the index and data register, access width and position of the bit that holds the Intel® TXT policy (refer to Table 3).
6. The indexed IO location must be accessible at reset without any hardware initialization.
7. If flat memory type pointer is used, the Address field holds a 64-bit memory address. The memory address should be under 4 GB. Bit0 at this address holds the Intel® TXT Configuration Policy (refer to Table 4).
8. The Intel® TXT Config policy says, whether Intel® TXT should be enabled or disabled. If Intel® TXT Policy =0, Intel® TXT should be disabled. If Intel® TXT Configuration Policy is 1, Intel® TXT should be enabled.
9. The default setting is 1. In other words, if this structure is not present or is invalid, the Startup ACM will behave, as if TXT Config Policy = 1.
10. The C_​V bit in this entry should be cleared to 0.
11. The Size field is not used. BIOS should set this field to 0.

Intel® TXT Enable Disable

typedef struct {

UINT16 IndexRegisterAddress; UINT16 DataRegisterAddress;

UINT8 AccessWidthInBytes; // 1=1 byte acceess, 2=2 byte access UINT8 BitPosition; // Bit number, 15=> Bit 15

UINT16 Index;

} INDEX_​IO_​ADDRESS;

typedef union {

UINT64 FlatMemoryAddress; INDEX_​IO_​ADDRESSIndexIo;

} TXT_​POLICY_​PTR;

Table 3. Intel® TXT Configuration Policy Entry Version = 0, Indexed IO Type Pointer

Table 4. Intel® TXT Configuration Policy Entry Version = 1, Flat Memory Type Pointer