| GPP_E4 / SATA_DEVSLP0 | OD | Serial ATA Port [0] Device Sleep: This is an open-drain pin on the PCH side. PCH will tri- state this pin to signal to the SATA device that it may enter a lower power state (pin will go high due to Pull-up that's internal to the SATA device, per DEVSLP specification). PCH will drive pin low to signal an exit from DEVSLP state. This pin can be mapped to SATA Port 0. |
| GPP_E5 / SATA_DEVSLP1 | OD | Serial ATA Port [1] Device Sleep: This is an open-drain pin on the PCH side. PCH will tri- state this pin to signal to the SATA device that it may enter a lower power state (pin will go high due to Pull-up that's internal to the SATA device, per DEVSLP specification). PCH will drive pin low to signal an exit from DEVSLP state. This pin can be mapped to SATA Port 1. |
| PCIE11_TXN / SATA0_TXN PCIE11_TXP / SATA0_TXP | O | Serial ATA Differential Transmit Pair 0: These outbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. |
| PCIE11_RXN / SATA0_RXN PCIE11_RXP / SATA0_RXP | I | Serial ATA Differential Receive Pair 0: These inbound SATA Port 0 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. |
| PCIE12_TXN / SATA1_TXN PCIE12_TXP / SATA1_TXP | O | Serial ATA Differential Transmit Pair 1 :These outbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. |
| PCIE12_RXN / SATA1_RXN PCIE12_RXP / SATA1_RXP | I | Serial ATA Differential Receive Pair 1: These inbound SATA Port 1 high-speed differential signals support 1.5 Gb/s, 3 Gb/s and 6 Gb/s. |
| GPP_E0 / SATAXPCIE0 / SATAGP0 | I | Serial ATA Port [0] General Purpose Inputs: When configured as SATAGP0, this is an input pin that is used as an interlock switch status indicator for SATA Port 0. Drive the pin to '0' to indicate that the switch is closed and to '1' to indicate that the switch is open. The default use of this pin is GPP_E0. Pin defaults to Native mode as SATAXPCIE0 depends on soft-strap. |
| GPP_A12 / SATAXPCIE1 / SATAGP1 | I | Serial ATA Port [1] General Purpose Inputs: When configured as SATAGP1, this is an input pin that is used as an interlock switch status indicator for SATA Port 1. Drive the pin to '0' to indicate that the switch is closed and to '1' to indicate that the switch is open. This default use of this pin is GPP_A12. Pin defaults to Native mode as SATAXPCIE1 depends on soft-strap. |
| GPP_B14 / SPKR / TIME_SYNC1 / SATA_LED# / ISH_GP6 | OD | Serial ATA LED: This signal is an open-drain output pin driven during SATA command activity. It is to be connected to external circuitry that can provide the current to drive a platform LED. When active, the LED is on. When tri-stated, the LED is off. An external Pull-up resistor to VCC3_3 is required. |