Integrated Pull-Ups and Pull-Downs

Legal Disclaimer
Revision History
Introduction
PCH Controller Device IDs
- Device and Revision ID
Memory Mapping
- Functional Description
- Memory Map
  - Boot Block Update Scheme
System Management
- Theory of Operation
  - Handling an Intruder
  - TCO Modes
High Precision Event Timer (HPET)
- Feature Overview
PCH Thermal Sensor
Power Delivery
- Power and Ground Signals
Pin Straps
Electrical and Thermal Characteristics
8254 Timers
- Timer Programming
- Reading from the Interval Timer
Audio Voice and Speech
Controller Link
Processor Sideband Signals
Digital Display Signals
Enhanced Serial Peripheral Interface (eSPI)
General Purpose Input and Output
- Signal Description
- Functional Description
Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers
Gigabit Ethernet Controller
Integrated Sensor Hub (ISH)
PCH and System Clocks
- ICC
  - Signal Descriptions
- I/O Signal Pin States
PCI Express* (PCIe*)
Power Management
Real Time Clock (RTC)
- Signal Description
- I/O Signal Planes and States
Serial ATA (SATA)
System Management Interface and SMLink
Host System Management Bus (SMBus) Controller
Serial Peripheral Interface (SPI)
Touch Host Controller (THC)
Intel® Serial IO Generic SPI (GSPI) Controllers
Testability
Intel® Serial I/O Universal Asynchronous Receiver/Transmitter (UART) Controllers
Universal Serial Bus (USB)
Connectivity Integrated (CNVi)
GPIO Serial Expander
Universal Flash Storage (UFS)
Private Configuration Space Target Port ID
Miscellaneous Signals

Signal Name	Resistor Type	Value	Notes
GSPI0_MOSI	Pull-Down	20 kohm± 30%	The integrated pull-down is disabled after PCH_PWROK assertion
GSPI1_MOSI	Pull-Down	20 kohm ± 30%	The integrated pull-down is disabled after PCH_PWROK assertion
GSPI2_MOSI	Pull-Down	20 kohm ± 30%	The integrated pull-down is disabled after PCH_PWROK assertion
GSPI0_MISO	Pull-Down	20 kohm ± 30%
GSPI1_MISO	Pull-Down	20 kohm ± 30%
GSPI2_MISO	Pull-Down	20 kohm ± 30%

Signal Description I/O Signal Planes and States