1

The Processor Base Power and Assured Power (cTDP) values are the average power dissipation in junction temperature operating condition limit, for the SKU Segment and Configuration, for which the processor is validated during manufacturing when executing an associated Intel-specified high-complexity workload at the processor IA core frequency corresponding to the configuration and SKU.

2

Processor Base Power workload may consist of a combination of processor IA core intensive and graphics core intensive applications.

3

Can be modified at runtime by MSR writes, with MMIO and with PECI commands.

4

'Turbo Time Parameter' is a mathematical parameter (units of seconds) that controls the processor turbo algorithm using a moving average of energy usage. Do not set the Turbo Time Parameter to a value less than 0.1 seconds. refer to Platform Power Control for further information.

5

The shown limit is a time averaged-power, based upon the Turbo Time Parameter. Absolute product power may exceed the set limits for short durations or under virus or uncharacterized workloads.

6

The Processor will be controlled to a specified power limit as described in Intel® Turbo Boost Technology 2.0 Power Monitoring. If the power value and/or 'Turbo Time Parameter' is changed during runtime, it may take a short time (approximately 3 to 5 times the 'Turbo Time Parameter') for the algorithm to settle at the new control limits.

7

This is a hardware default setting and not a behavioral characteristic of the part.

8

For controllable turbo workloads, the PL2 limit may be exceeded for up to 10ms.

9

LPM power level is an opportunistic power and is not a guaranteed value as usages and implementations may vary.

10

Power limits may vary depending on if the product supports the Minimum Assured Power (cTDP Down) and/or Maximum Assured Power (cTDP Up) modes. Default power limits can be found in the PKG_​PWR_​SKU MSR (614h).

11

The processor tile does not reach maximum sustained power simultaneously since the sum of all active circuit's estimated power budget is controlled to be equal to or less than the specified PL1 limit.

12

Minimum Assured Power(cTDP Down) is based on 128EU equivalent graphics configuration. Minimum Assured Power(cTDP Down) does not decrease the number of active Processor Graphics EUs but relies on Power Budget Management (PL1) to achieve the specified power level.

13

May vary based on SKU.

14

• The formula of PL2=PL1*1.25 is the hardware.
• PL2- Processor opportunistic higher Average Power with limited duration controlled by Tau_​PL1 setting, the larger the Tau, the longer the PL2 duration.

15

Processor Base Power (TDP) workload does not reflect various I/O connectivity cases such as Thunderbolt.

16

Hardware default of PL1 Tau=1s, By including the benefits available from power and thermal management features the recommended is to use PL1 Tau=28s.

H-Series Processor BGA

6P+8E Core 45W

3.1

65

1,9,10,11,12, 15

2.5

Processor Base power

(TDP)

2.3

45

1.8

1.7

35

1.2

0.4

N/A

0.8

N/A

0.1

H-Series Processor BGA

6P+8E Core 28W

3.0 up to 3.1

65

1,9,10,11,12, 15

2.4 up to 2.5

Processor Base power

(TDP)

1.4

28

0.9

1.0

20

0.5

0.4

N/A

0.8

N/A

0.1

U-Series Processor BGA

2P+8E Core 15W

( cTDP Up )

2.7

28

1,9,10,11,12, 15

2.2

Processor Base power

(TDP)

1.3 up to 1.7

15

0.8 up tp 1.2

1.0 up to 1.4

12

0.5 up to 0.9

0.4

N/A

0.8

N/A

0.1

U4-Series Processor BGA

2P+8E Core 9W

( cTDP Up )

1.8 up to 2.1

15

1,9,10,11,12, 15

1.3 up to 1.5

Processor Base power

(TDP)

0.7 up to 1.1

9

0.5 up to 0.7

0.4

N/A

0.8

N/A

0.1