Pad Ownership (PAD_OWN_GPP_C_0) – Offset 20 - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

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8254 Timer
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Pad Ownership (PAD_OWN_GPP_C_0) – Offset 20

Bit Range	Default	Access	Field Name and Description
30	-	-	Reserved
29:28	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_7) Same description as bits [1:0], except that the bit field applies to GPP_C7.
27:26	-	-	Reserved
25:24	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_6) Same description as bits [1:0], except that the bit field applies to GPP_C6.
23:22	-	-	Reserved
21:20	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_5) Same description as bits [1:0], except that the bit field applies to GPP_C5.
19:18	-	-	Reserved
17:16	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_4) Same description as bits [1:0], except that the bit field applies to GPP_C4.
15:14	-	-	Reserved
13:12	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_3) Same description as bits [1:0], except that the bit field applies to GPP_C3.
11:10	-	-	Reserved
9:8	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_2) Same description as bits [1:0], except that the bit field applies to GPP_C2.
7:6	-	-	Reserved
5:4	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_1) Same description as bits [1:0], except that the bit field applies to GPP_C1.
3:2	-	-	Reserved
1:0	00b	RW	Pad Ownership (PAD_OWN_GPPC_C_0) 00 = Host GPIO ACPI Mode or GPIO Driver Mode. Host software (ACPI or GPIODriver) has ownership of the pad. In Host GPIO Driver Mode (refer toHOSTSW_OWN), GPIO input event update is limited to GPI_STS update only.Otherwise in Host ACPI Mode, updates are limited to GPI_GPE_STS, GPI_NMI_STSand/or GPI_SMI_STS. No read/write restriction to the Pad Configuration register set during host ownership 01 = ME GPIO Mode. ME has ownership of the pad. 10 = ISH GPIO Mode. ME has ownership of the pad 11 = Reserved

Pad Ownership (PAD_OWN_GPP_C_1)

Miscellaneous Configuration (MISCCFG) Pad Ownership (PAD_OWN_GPP_C_1)