I2C Control (IC_CON) – Offset 0 - 1.2 - ID:615146 | Intel® 400 Series Chipset On-Package Platform Controller Hub

Intel® 400 Series Chipset On-Package Platform Controller Hub

Online Register Database

ID	Date	Version	Classification
615146	08/09/2019	1.2	Public

I2C Control (IC_CON) – Offset 0

This register can be written only when the I2C is disabled, which corresponds to the IC_ENABLE register being set to 0. Writes at other times have no effect.

Bit Range	Default	Access	Field Name and Description
30:9	-	-	Reserved
8	0h	RW	TX Empty Control (TX_EMPTY_CTRL) This bit controls the generation of the TX_EMPTY interrupt, asdescribed in the IC_RAW_INTR_STAT register.
7	-	-	Reserved
6	1h	RW	IC_SLAVE_DISABLE (IC_SLAVE_DISABLE) This bit controls whether I2C has its slave disabled.If this bit is set (slave is disabled), the function only works as a master and does not perform any action that requires a slave. 0:Reserved 1: slave is disabled NOTE: For Master Device Configuration Software must ensure that this bit is set to 1, and bit 0 must also be set to 1. Else this will result in configuration error
5	1h	RO	Restart Enable (IC_RESTART_EN) Determines whether RESTART conditions may be sent when I2C is acting as a master. 0: Restart disable 1: Restart enable When the RESTART is disabled, the IP isincapable of performing the following functions: • Sending a START BYTE • Performing any high-speed mode operation • Performing direction changes in combined format mode • Performing a read operation with a 10-bit address By replacing RESTART condition followed by a STOP and a subsequent START condition, split operations are broken down into multiple transfers. If the above operations are performed, it will result in setting bit 6 (TX_ABRT) of the IC_RAW_INTR_STAT register.
4	1h	RO	7_10 Bit Addressing (IC_10BITADDR_MASTER_rd_only) Identifies if I2C operates in 7 or 10 bit addressing. 0: 7-bit addressing 1: 10-bit addressing
3	-	-	Reserved
2:1	3h	RW	Speed (SPEED) These bits control at which speed the I2C operates. 01: standard mode (0 to 100 kbit/s) 10: fast mode (< = 400 kbit/s) 11: high speed mode (< = 3.4 Mbit/s) Others: reserved
0	1h	RW	Master Mode (MASTER_MODE) This bit controls whether I2C master is enabled. 0 = Reserved 1 = Master Enabled Note: For Master Device Configuration Software must ensure that this bit is set to 1, and bit 6 must also be set to 1. Else this will result in configuration error.