Summary Tables of Changes

10th Generation Intel® Core™ Processor

Specification Update

ID	Date	Version	Classification
341079	10/01/2024		Public

The following table indicates the Specification Changes, Errata, Specification Clarifications or Documentation Changes, which apply to the listed processor stepping. Intel intends to fix some of the errata in a future stepping of the component, and to account for the other outstanding issues through documentation or Specification Changes as noted. This table uses the following notations:

Codes Used in Summary Table

Stepping	Description
(No mark) or (Blank Box)	This erratum is fixed in listed stepping or specification change does not apply to listed stepping

Status	Description
Doc	Document change or update that will be implemented
Planned Fix	This erratum may be fixed in a future stepping of the product
Fixed	This erratum has been previously fixed in Intel^® hardware, firmware, or software
No Fix	There are no plans to fix this erratum

Errata Summary Table

Erratum ID	Processor Line/ Stepping		Title
Erratum ID	U	Y	Title
ICL001	No Fix	No Fix	Incorrect Branch Predicted Bit in BTS/BTM Branch Records
ICL002	No Fix	No Fix	PEBS Eventing IP Field May be Incorrect After Not-Taken Branch
ICL003	No Fix	No Fix	Intel^® PT TIP.PGD May not have Target IP Payload
ICL004	No Fix	No Fix	SMRAM State-Save Area Above the 4GB Boundary May Cause Unpredictable System Behavior
ICL005	No Fix	No Fix	x87 FPU Exception (#MF) May be Signaled Earlier than Expected
ICL006	No Fix	No Fix	Intel^® Processor Trace PSB+ Packets May Contain Unexpected Packets
ICL007	No Fix	No Fix	Performance Monitoring Counters May Undercount When Using CPL Filtering
ICL008	No Fix	No Fix	Vector Masked Store Instructions May Cause Write Back of Cache Line Where Bytes are Masked
ICL009	No Fix	No Fix	Incorrect FROM_IP Value for an RTM Abort in BTM or BTS May be Observed
ICL010	No Fix	No Fix	#GP on Segment Selector Descriptor that Straddles Canonical Boundary May Not Provide Correct Exception Error Code
ICL011	No Fix	No Fix	x87 FDP Value May be Saved Incorrectly
ICL012	No Fix	No Fix	Execution of VAESIMC or VAESKEYGENASSIST with an Illegal Value for VEX.vvvv May Produce a #NM Exception
ICL013	No Fix	No Fix	Execution of FXSAVE or FXRSTOR With the VEX Prefix May Produce a #NM Exception
ICL014	No Fix	No Fix	Writing Non-Zero Values to Read Only Fields in IA32_THERM_STATUS MSR May #GP
ICL015	No Fix	No Fix	Debug Exceptions May be Lost or Misreported When MOV SS or POP SS Instruction is Not Followed by a Write to SP
ICL016	No Fix	No Fix	Intel^® PT VMentry Indication Depends on the Incorrect VMCS Control Field
ICL017	No Fix	No Fix	Execution of VAESENCLAST Instruction May Produce a #NM Exception Instead of a #UD Exception
ICL018	No Fix	No Fix	Performance Monitoring ASCI Status Bit May be Inaccurate
ICL019	No Fix	No Fix	Setting Performance Monitoring IA32_PERF_GLOBAL_STATUS_SET MSR Bit 63 May Not #GP
ICL020	No Fix	No Fix	WRMSR to PRMRR_MASK May Result in #GP When the Resulting PRMRR Range is Empty
ICL021	No Fix	No Fix	When Virtualization Exceptions are Enabled, EPT Violations May Generate Erroneous Virtualization Exceptions
ICL022	No Fix	No Fix	CPUID TLB Information is Inaccurate
ICL023	No Fix	No Fix	Performance Monitoring Load Latency Events May be Inaccurate for Gather Instructions
ICL024	No Fix	No Fix	CPUID L2 Cache Information May be Inaccurate
ICL025	No Fix	No Fix	Intel^® SGX Enclave Accesses to the APIC-Access Page May Cause APIC-Access VM Exits
ICL026	No Fix	No Fix	Intel^® PT PSB+ May be Lost
ICL027	No Fix	No Fix	Intel^® PT CBR Packet May be Delayed or Silently Dropped
ICL028	No Fix	No Fix	Intel^® PT TIP or FUP Packets May be Dropped Without OVF Packet
ICL029	No Fix	No Fix	Intel^® PT Trace May Drop Second Byte of CYC Packet
ICL030	No Fix	No Fix	VM Entry That Clears TraceEn May Generate a FUP
ICL031	No Fix	No Fix	VCVTPS2PH To Memory May Update MXCSR in the Case of a Fault on the Store
ICL032	No Fix	No Fix	PECI Frequency Limited to 3.2Kbps-1Mbps
ICL033	N/A		N/A. Erratum has been removed
ICL034	No Fix	No Fix	TCSS USB Host Controller (xHCI) May Hang
ICL035	Fixed	N/A	Unpopulated Type-C to Type-B or Type-A Converter (Cable or Dongle) May Degrade Type-C Port Functionality
ICL036	No Fix	No Fix	Swapping Devices on Type-C Ports in S3 May Degrade Type-C Port Functionality
ICL037	N/A	N/A	Duplicate of Erratum 039
ICL038	No Fix	No Fix	USB 3.1 Gen2 Link Compliance Test TD7.39 (Port Match Retry Test) May Fail
ICL039	Fixed	Fixed	The Processor May Consume Higher-Than-Expected Power During Light Workloads
ICL040	Fixed	Fixed	Processor May Hang When Both Threads are Active on a Physical Core
ICL041	Fixed	N/A	Processor May Hang During High-Throughput Graphics Scenarios
ICL042	Fixed	Fixed	PROCHOT De-assertion May Lead to False Processor LFM
ICL043	No Fix	No Fix	Some Errors Logged in IA32_MC1_STATUS May Not Generate Machine Check Exceptions
ICL044	Fixed	Fixed	The Processor May Assert THRMTRIP#
ICL045	No Fix	No Fix	Placing Page Table Information in the APIC-Access Page May Lead to Unexpected Page Faults While Performing Enclave Accesses
ICL046	No Fix	No Fix	Instruction Fetch May Cause Machine Check if Page Size Was Changed Without Invalidation
ICL047	Fixed	Fixed	System May Hang When Graphics Core is Running in Low Frequency Mode
ICL048	Fixed	Fixed	USB 3.x Devices May Not Enumerate or May Downgrade to USB2 Speeds on Ports Without a Retimer
ICL049	Fixed	Fixed	Isochronous Devices May Experience Deferred Memory Accesses
ICL050	Fixed	Fixed	FIVR PS5 Insufficient Current During PKG-C6 Resume
ICL051	Fixed	Fixed	LPDDR4x May Incorrectly Exit Self-Refresh
ICL052	Fixed	N/A	Incorrect TCSS DTS When a Thunderbolt™ Device is Connected
ICL053	Fixed	Fixed	REP MOVSB Instruction to or From A Non-flat Segment May Cause Unpredictable System Behavior
ICL054	No Fix	No Fix	MASKMOV* Instruction to a Physical Memory Location Mapped by Two Linear Addresses of Different Page Sizes May Result in Unpredictable System Behavior
ICL055	Fixed	Fixed	USB 3.x Link Training Failure
ICL056	Fixed	Fixed	VTd DMA Remapping Disable in Gfx IOMMU May Cause Display Artifacts or Flickering
ICL057	Fixed	Fixed	MDS_NO Bit in IA32_ARCH_CAPABILITIES MSR is Incorrectly Set
ICL058	No Fix	No Fix	Overflow Flag in IA32_MC0_STATUS MSR May be Incorrectly Set
ICL059	No Fix	No Fix	IA32_L3_QOS_Mask_N Accepts Non-Contiguous Masks
ICL060	No Fix	No Fix	System May Hang When CR0.TS Or CR0.EM are Set
ICL061	Fixed	Fixed	Processor May Experience Unexpected System Behaviour When CR0.TS Or CR0.EM are Set
ICL062	No Fix	No Fix	Wrong Page Access Semantics May be Reported When Intel^® SGX ENCLU[EMODPE] Instruction Generates Page Fault (#PF) Exception
ICL063	Fixed	Fixed	Usage of Bit 55 of IA32_TSC_DEADLINE MSR May Cause Spurious Timer Interrupt
ICL064	Fixed	Fixed	Time Stamp Counters May Contain A Shifted Time Value
ICL065	Fixed	Fixed	Unpredictable System Behaviour Due to Move Elimination
ICL066	Fixed	Fixed	REP MOVSB Might Lead to Incorrect ESP
ICL067	Fixed	Fixed	A Ring Interconnect Performance State Transition May Result in Unpredictable System Behaviour
ICL068	No Fix	No Fix	Uncore Performance Monitoring Controls May Not Function Properly
ICL069	Fixed	Fixed	A Memory Controller Domain Low Power Mode Transition May Result in Retrieval of Incorrect Data from Memory
ICL070	Fixed	Fixed	VT-d Domain-Specific Context Cache Invalidation Requests May Not Complete
ICL071	Fixed	Fixed	Type-C Ports Configured as DP-FIXD May Lead to System Hang
ICL072	No Fix	No Fix	VERR Instruction Inside VM-entry May Cause DR6 to Contain Incorrect Values
ICL073	No Fix	No Fix	Processor May Hang if Warm Reset Triggers During BIOS Initialization
ICL074	N/A	N/A	N/A. Erratum has been Removed.
ICL075	No Fix	No Fix	IA32_RTIT_STATUS.FilterEn Bit Might Reflect A Previous Value
ICL076	Fixed	Fixed	SSBD May Not Properly Restrict Load Execution
ICL077	No Fix	No Fix	Executing an XSAVE or VZEROALL Instruction After SYSENTER May Result in Unexpected SSE/AVX Register Values
ICL078	No Fix	No Fix	False MC1 Error Reported in the Shadow of an Internal Timer Error
ICL079	No Fix	No Fix	Placing Posted-Interrupt Descriptors Within the PRMRR May Result in a Processor Hang
ICL080	No Fix	No Fix	System May Experience an Internal Timeout Error When Directing Intel^® PT to a Small, Uncacheable, Single-Range Output Buffer
ICL081	No Fix	No Fix	Setting MISC_FEATURE_CONTROL.DISABLE_THREE_STRIKE_CNT Does Not Prevent the Three-strike Counter from Incrementing
ICL082	No Fix	No Fix	Intel^® PT Trace May Contain Incorrect Data When Configured with Single Range Output Larger Than 4KB
ICL083	No Fix	No Fix	Incorrect MCACOD For L2 Prefetch MCE
ICL084	No Fix	No Fix	Call Instruction Wrapping Around The 32-bit Address Boundary May Return to Incorrect Address
ICL085	Fixed	Fixed	Branch Predictor May Produce Incorrect Instruction Pointer
ICL086	No Fix	No Fix	USB 3.2 DbC Sublink Speed Attribute ID (SSID) Value
ICL087	No Fix	No Fix	A Write to The TSC_Deadline MSR May Cause an Unexpected Timer Interrupt
ICL088	Fixed	Fixed	Processor May Hang During a Microcode Update
ICL089	No Fix	No Fix	xHCI Out of Order ACK Due to LCRD1

Specification Changes

No.	Specification Changes
001	PKG-C9 disabled
002	FIVR Power state 5 (PS5) disabled

Specification Clarifications

No.	Specification Clarifications
	None for this revision of this specification update.

Documentation Changes

No.	Documentation Changes
	None for this revision of this specification update.