FIT Reset State (Type 6) Rules

FIT Reset (Type 6) entry is used on platforms which require certain CPU states to be initialized at reset vector.

1. At least one Type 6 Entry must be specified on such platforms. Otherwise, this entry is not required, and will be ignored if present.
2. The address field points to a FIT reset state table.  Specifically, the address field in the type 6 record points to the first byte of the FIT reset state table.
3. Each Type 6 entry must point to an address that is accessible by the processor at reset (i.e., requires no chipset configuration to reach that address in the flash).
4. The FIT reset state table pointed to by a type 6 entry must be aligned on a 16-byte address.
5. The FIT reset state table pointed to by a type 6 entry must not be compressed, encoded, or encrypted by the BIOS.
6. The Size field is not used.  BIOS should clear this field to 0.
7. The Version field should be set to 0x0100.
8. The C_​V bit in this entry should be clear to 0.