Intel® TXT Policy Data Record (Type 0xA) Rules

There can be zero or one Intel® TXT Configuration Policy Record in the FIT.

1. If TXT is supported by a platform, single instance of Type 0xA record must exist.
2. Type 0xA entry address field must contain an address accessible by the processor at reset vector.
3. The address field contains the TXT_​CONFIG_​POLICY_​PTR structure. This structure contains the address, where the TXT Configuration Policy information resides. (Refer section 4.11.1)
4. The version field must be set to 0 if TXT_​CONFIG_​POLICY_​PTR describes an Indexed IO type pointer.
5. The version field must be set to 1 if TXT_​CONFIG_​POLICY_​PTR describes a flat memory pointer.
6. If indexed IO type pointer is used, the Address field holds a structure of the type INDEX_​IO_​ADDRESS – see section 4.9.1. This structure contains the IO addresses of the index and data register, access width and position of the bit that holds the Intel® TXT policy.
7. The indexed IO location must be accessible at reset without any hardware initialization.
8. If flat memory type pointer is used, the Address field holds a 64-bit memory address. The memory address should be under 4 GB. Bit0 at this address holds the Intel® TXT Configuration Policy.
9. The Intel® TXT Configuration policy says whether Intel® TXT should be enabled or disabled. If TXT Configuration Policy == 0 the Intel® TXT should be disabled. If TXT Configuration Policy == 1 the Intel® TXT should be enabled.
10. The default setting is 1. In other words, if this structure is not present or is invalid, the Startup ACM will behave, as if TXT Configuration Policy == 1 but this may create a mismatch between BIOS and ACM TXT processing.
11. The C_​V bit in this entry should be cleared to 0.
12. The Size field is not used. BIOS should set this field to 0.

Table 5. Type 0xA Record Structure

TXT Configuration Policy

typedef union {

UINT64 FlatMemoryAddress;

INDEX_​IO_​ADDRESS IndexIo; // see section 4.9.1

} TXT_​CONFIG_​POLICY_​PTR;