Intel® 700 Series Chipset Family On-Package Platform Controller Hub (PCH)
Datasheet, Volume 1 of 2
Supporting Raptor Lake - PX Platforms
Signal Description
| Name | Type | Description |
|---|---|---|
| Intel High Definition Audio Signals | ||
| GPP_R4/HDA_RST#/DMIC_CLK_A0 | O | Intel HD Audio Reset: Master H/W reset to internal/external codecs. |
| GPP_R1/HDA_SYNC/DMIC_CLK_B1 | O | Intel HD Audio Sync: 48 kHz fixed rate frame sync to the codecs. Also used to encode the stream number. |
| GPP_R0/HDA_BCLK/DMIC_CLK_B0/HDA_PROC_BCLK | O | Intel HD Audio Bit Clock: Up to 24 MHz serial data clock generated by the Intel HD Audio controller. |
| GPP_R2/HDA_SDO/HDA_PROC_SDO | O | Intel HD Audio Serial Data Out: Serial TDM data output to the codecs. The serial output is double-pumped for a bit rate of up to 48 Mb/s. |
| GPP_R3/HDA_SDI0/HDA_PROC_SDI | I | Intel HD Audio Serial Data In 0: Serial TDM data input from the two codec(s). The serial input is single-pumped for a bit rate of up to 24 Mb/s. These signals contain integrated Pull-down resistors, which are enabled while the primary well is powered. |
| GPP_R5/HDA_SDI1/DMIC_DATA0 | I | Intel HD Audio Serial Data In 1: Serial TDM data input from the two codec(s). The serial input is single-pumped for a bit rate of up to 24 Mb/s. These signals contain integrated Pull-down resistors, which are enabled while the primary well is powered. |
| Intel Display Audio Interface | ||
| GPP_R0/HDA_BCLK/DMIC_CLKB0/HDA_PROC_BCLK | O | Display Audio Bit Clock: Serial data clock generated by the Intel HD Audio controller. PCH supports data rate of up to 96 Mb/s. |
| GPP_R2/HDA_SDO/HDA_PROC_SDO | O | Display Audio Serial Data Out: Serial TDM data output to the codec. PCH supports data rate of up to 96 Mb/s. |
| GPP_R3/ HDA_SDI0/HDA_PROC_SDI | I | Display Audio Serial Data In: Serial TDM data input from the codec. PCH supports data rate of up to 96 Mb/s. |
| DMIC Interface | ||
| GPP_S2/SNDW1_CLK/DMIC_CLKA0 or GPP_R4/HDA_RST#/DMIC_CLKA0 | O | Digital Mic Clock A0:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control. |
| GPP_S6/SNDW3_CLK/DMIC_CLKA1 | O | Digital Mic Clock A1:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. |
| GPP_S4/SNDW2_CLK/DMIC_CLKB0 or GPP_R0/HDA_BCLK/DMIC_CLKB0/HDA_PROC_BCLK | O | Digital Mic Clock B0:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control. |
| GPP_S5/SNDW2_DATA/DMIC_CLKB1 or GPP_R1/HDA_SYNC/ DMIC_CLKB1 | O | Digital Mic Clock B1:Serial data clock generated by the HD Audio controller. The clock output frequency is up to 4.8 MHz. May be duplicated into CLKA and CLKB for individual left / right DMIC power control. |
| GPP_S3/SNDW1_DATA/DMIC_DATA0 or GPP_R5/HDA_SDI1/DMIC_DATA0 | I | Digital Mic Data:Serial data input from the digital mic. |
| GPP_S7/SNDW3_DATA/DMIC_DATA1 or GPP_R7/DMIC_DATA1 | I | Digital Mic Data:Serial data input from the digital mic. |
| SoundWire Interface | ||
| GPP_S0/SNDW0_CLK | I/O | SoundWire Clock: Serial data clock to external peripheral devices. |
| GPP_S1/SNDW0_DATA | I/O | SoundWire Data: Serial data input from external peripheral devices. |
| GPP_S2/SNDW1_CLK/DMIC_CLKA0 | I/O | SoundWire Clock: Serial data clock to external peripheral devices. |
| GPP_S3/SNDW1_DATA/DMIC_DATA0 | I/O | SoundWire Data: Serial data input from external peripheral devices. |
| GPP_S4/SNDW2_CLK/DMIC_CLKB0 | I/O | SoundWire Clock: Serial data clock to external peripheral devices. |
| GPP_S5/SNDW2_DATA/DMIC_CLKB1 | I/O | SoundWire Data: Serial data input from external peripheral devices. |
| GPP_S6/SNDW3_CLK/DMIC_CLKA1 | I/O | SoundWire Clock: Serial data clock to external peripheral devices. |
| GPP_S7/SNDW3_DATA/DMIC_DATA1 | I/O | SoundWire Data: Serial data input from external peripheral devices. |
| SNDW_RCOMP | I/O | SoundWire RCOMP:200ohm +/- 1% compensation resistor required to ground. |
| Misc | ||
| GPP_B14/SPKR/TIME_SYNC1/ISH_GP6 | O | Speaker Output:Used for connection to external speaker for POST sounds if not using HD_Audio embedded option. |