13th Generation Intel® Core™, Intel® Core™ 14th Generation and Intel® Xeon™ E 2400 Processor
Specification Update
Summary Tables of Changes
The following table indicates the Specification Changes, Errata, Specification Clarifications or Documentation Changes, which apply to the listed processor stepping. Intel® intends to fix some of the errata in a future stepping of the component, and to account for the other outstanding issues through documentation or Specification Changes as noted. This table uses the following notations:
Codes Used in Summary Table
Stepping | Description |
(No mark) or (Blank Box) | This erratum is fixed in listed stepping or specification change does not apply to listed stepping. |
Status | Description |
Planned Fix | This erratum may be fixed in a future stepping of the product. |
Fixed | This erratum has been previously fixed in Intel® hardware, firmware, or software. |
No Fix | There are no plans to fix this erratum. |
Errata Summary Table
S/S-Refresh | E | S | P/H | HX | U | ||||
8+16 | 8+0 | 8+8 | 6+0 | 6+8 | 8+16 | 8+8 | 2+8 | ||
RPL001 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Intel® Processor Trace PSB+ Packets May Contain Unexpected Packets |
RPL002 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL003 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL004 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL005 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | BMI1, BMI2, LZCNT, ADXC, and ADOX Instructions May Not Generate an #UD |
RPL006 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL007 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Processor May Generate Spurious Page Faults On Shadow Stack Pages |
RPL008 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Processor May Hang if Warm Reset Triggers During BIOS Initialization |
RPL009 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | System May Hang When Bus-Lock Detection Is Enabled And EPT Resides in Uncacheable Memory |
RPL010 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL011 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL012 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL013 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Incorrectly Formed PCIe Packets May Generate Correctable Errors |
RPL014 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Single Step on Branches Might be Missed When VMM Enables Notification On VM Exit |
RPL015 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL016 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL017 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Intel® PT Trace May Contain Incorrect Data When Configured With Single Range Output Larger Than 4KB |
RPL018 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | IA32_PERF_CAPABILITIES.PERF_METRICS_AVAILABLE is Not Set |
RPL019 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | OFFCORE_REQUESTS_OUTSTANDING Performance Monitoring Events May be Inaccurate |
RPL020 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | On Instructions Longer Than 15 Bytes, #GP Exception is Prioritized And Delivered Over #CP Exception |
RPL021 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Mismatch on DR6 Value When Breakpoint Match is on Bitmap Address |
RPL022 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | RTM Abort Status May be Incorrect For INT1/INT3 Instructions |
RPL023 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL024 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Call Instruction Wrapping Around The 32-bit Address Boundary May Return to Incorrect Address |
RPL025 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL026 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL027 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL028 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Unexpected #PF Exception Might Be Serviced Before a #GP Exception |
RPL029 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | WRMSR to Reserved Bits of IA32_L3_QOS_Mask_15 Will Not Signal a #GP |
RPL030 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | VMX-Preemption Timer May Not Work if Configured With a Value of 1 |
RPL031 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL032 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | VM Exit Qualification May Not be Correctly Set on APIC Access While Serving a User Interrupt |
RPL033 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Unable to Transmit Modified Compliance Test Pattern at 2.5 GT/S or 5.0 GT/s Link Speeds |
RPL034 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL035 | N/A | N/A | No Fix | N/A | N/A | N/A | N/A | N/A | Unsynchronized Cross-Modifying Code Operations Can Cause Unexpected Instruction Execution Results |
RPL036 | N/A | N/A | N/A | N/A | No Fix | No Fix | No Fix | No Fix | |
RPL037 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Type-C Host Controller Does Not Support Certain Qword Accesses |
RPL038 | N/A | N/A | Fixed | Fixed | N/A | N/A | N/A | N/A | |
RPL039 | Fixed | Fixed | Fixed | Fixed | Fixed | Fixed | Fixed | Fixed | Unexpected System Hang During Enhanced Intel SpeedStep Transitions |
RPL040 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Processor May Encrypt TME Exclude Range if Mapped to Remap Range |
RPL041 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Precision Time Measurement (PTM) Interpretation Capability Bit Incorrect Register Offset |
RPL042 | Fixed | Fixed | Planned Fix | N/A | Fixed | Fixed | Planned Fix | Fixed | INVLPG May Invalidate Global TLB Entries Only For The Current PCID |
RPL043 | Fixed | Fixed | Planned Fix | Planned Fix | Fixed | Fixed | Planned Fix | Fixed | Machine Check Exception May be Observed During Package C6 Entry |
RPL044 | N/A | N/A | Fixed | Fixed | N/A | N/A | Fixed | N/A | |
RPL045 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | IA32_MC2_ADDR And IA32_MC2_MISC MSRs Will be Cleared on Warm Reset |
RPL046 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL047 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL048 | Fixed | Fixed | N/A | N/A | N/A | Fixed | N/A | N/A | IA32_SPEC_CTL Bits IPRED_DIS_U, IPRED_DIS_S And BHI_DIS_S May Not Function Correctly |
RPL049 | Fixed | Fixed | Planned Fix | Planned Fix | Fixed | Fixed | Planned Fix | Fixed | |
RPL050 | Fixed | Fixed | Planned Fixed | N/A | Fixed | Fixed | Planned Fixed | Fixed | |
RPL051 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | |
RPL052 | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | No Fix | Performance Monitoring Events TOPDOWN.BACKEND_BOUND_SLOTS and IDQ_BUBBLES May be Inaccurate |
RPL053 | N/A | N/A | N/A | N/A | No Fix | N/A | N/A | No Fix | |
Specification Changes
No. | Specification Changes |
None for this revision of this specification update. |
Specification Clarifications
No. | Specification Clarifications |
None for this revision of this specification update. |
Documentation Changes
No. | Documentation Changes |
None for this revision of this specification update. |