Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ACPI Timer Control (ACPI_TMR_CTL) – Offset 18fc
This register allows software to disable the ACPI Timer, which could result in power savings for the PCH.
This register is in the CORE power well and is reset by PLTRST#
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:2 | - | - | Reserved
|
1 | 0b | RW | ACPI Timer Disable (ACPI_TIM_DIS) This bit determines whether the ACPI Timer is enabled to run. |
0 | 0b | RW/1S/V | ACPI Timer Clear (ACPI_TIM_CLR) Writing a 1 to this bit will clear the ACPI Timer to all 0s. Hardware will automatically clear the bit back to 0 once the timer clear operation has completed. |