MNVCCIN: MIN VCCIN VID

Offset 37h-36h is the Processor Vsa minimum Voltage Identification (VID) field and contains the minimum voltage requested via the VID pins. This field, rounded to the next thousandth, is in mV and is reflected in binary coded decimal. Some systems read this offset to determine if all processors support the same default VID setting. Writes to this register have no effect.

Example: A voltage of 600 mV maximum core VID would contain 600h in Offset 37- 36h.