Intel® 700 Series Chipset Family On-Package Platform Controller Hub (PCH)
Datasheet, Volume 1 of 2
| ID | Date | Version | Classification |
|---|---|---|---|
| 763122 | 01/03/2023 | 001 | Public |
Serial Peripheral Interface (SPI)
The PCH provides two Serial Peripheral Interfaces (SPI). The SPI0 interface consists of three Chip Select signals. SPI0 interface can allow two flash memory devices (SPI0_CS0# and SPI0_CS1#) and one TPM device (SPI0_CS2#) to be connected to the PCH. The SPI0 interface support either 1.8 V or 3.3 V. The voltage is selected via a Hardware strap on
| Acronyms | Description |
|---|---|
| CLK | Clock |
| CS | Chip Select |
| FCBA | Flash Component Base Address |
| FIBA | Flash Initialization Base Address |
| FLA | Flash Linear Address |
| FMBA | Flash Master Base Address |
| FPSBA | Flash PCH Strap Base Address |
| FRBA | Flash Region Base Address |
| MDTBA | MIP Descriptor Table Base Address |
| MISO | Mater In Slave Out |
| MOSI | Mater Out Slave In |
| TPM | Trusted Platform Module |