13th Generation Intel® Core™ and Intel® Core™ 14th Generation Processors

Datasheet, Volume 1 of 2
Supporting 13th Generation Intel® Core™ Processor for S, H, P, HX, and U Processor Line Platforms, formerly known as Raptor Lake, Intel® Core™ 14th Generation Processor for S, HX, and U Processor Line Platform, formerly known as Raptor Lake Refresh and Intel® Xeon™ E 2400 Processor, formerly known As Raptor Lake–E

ID 743844
Date 03/25/2024
Document Table of Contents

Intel® Memory Thermal Management

DRAM Thermal Aggregation

P-Unit firmware is responsible for aggregating DRAM temperature sources into a per-DIMM reading as well as an aggregated virtual 'max' sensor reading. At reset, MRC communicates to the MC the valid channels and ranks as well as DRAM type. At that time, Punit firmware sets up a valid channel and rank mask that is then used in the thermal aggregation algorithm to produce a single maximum temperature

DRAM Thermal Monitoring

  • DRAM thermal sensing Periodic DDR thermal reads from DDR
  • DRAM thermal calculation Punit reads of DDR thermal information direct from the memory controller (MR4 or MPR) Punit estimation of a virtual maximum DRAM temperature based on per-rank readings. Application of thermal filter to the virtual maximum temperature.

DRAM Refresh Rate Control

The MRC will natively interface with MR4 or MPR readings to adjust DRAM refresh rate as needed to maintain data integrity. This capability is enabled by default and occurs automatically. Direct override of this capability is available for debug purposes, but this cannot be adjusted during runtime.