ATX Version 3.0 Multi Rail Desktop Platform Power Supply

Design Guide

ID 336521
Date 01/02/2022
Public

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Document Table of Contents

PCIe* AIC Auxiliary Power Connectors

The PCIe CEM 5.0 specification defines three 12V Auxiliary Power Connectors to be used with PCIe Add-in Cards

  1. 75 W 2x3 connector
  2. 150 W 2x4 connector
  3. 600 W 2x6 12VHPWR connector (new in PCIe 5.0)

Section Section 5.2 specifies the Mechanical information for all DC Power Connectors. Note that the Voltage Tolerance listed below is different from this Power Supply Design Guide for the Low voltage tolerance Table 4-2, the reason for the difference is allowing for voltage drop on a motherboard from the Main Power Connector to the motherboard to the PCIe* Edge Card Connector. Table 3-5 shows the voltage tolerance required to the PCIe* Add-in Card at both the motherboard edge card connector and Auxiliary Power connectors. Each Auxiliary Power Connector must have voltage pins that belong to the same +12V power converter, if multiple voltage rails exist from the PSU.

Table 3-5: Auxiliary Power Connectors Power Supply Rail Requirements - +12V Only

+12V Power Rail Characteristic

2x3 Connector

2x4 Connector

12VHPWR Connector

Sustained Power2, 4, 5

75 Watts

150 Watts

600 Watts

+ 12 V

Voltage Range

+5% / -8%

+5% / -8%

+5% / -8%

Current3, 4, 5

(Max RMS)

6.75 Amps

13.5 Amps

55 Amps 1

  1. The maximum current slew rate for the 12VHPWR connector interface shall be no more than 5.0 A/µs.
  2. Maximum sustained power is an average power in any continuous 1 second interval
  3. Maximum of root-mean-square (RMS) of current in any continuous 1 second interval
  4. The main reference limit is the maximum allowed sustained power per connector and Add-in Card type. Add-in Card and System must concurrently comply with all power and voltage and current requirements in this table for the applicable connector and other requirements in this specification for the Add-in Card type.
  5. Maximum instantaneous and other excursions exceeding these limits are defined in Section Section 3.1 of this document.