13th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2
Supporting 13th Generation Intel® Core™ Processor for S Processor Line Platforms, formerly known as Raptor Lake

ID 743844
Date 10/13/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Data Swapping

By default, the processor supports on-board data swapping in two manners (for all segments and DRAM technologies):

  • Bit swapping is allowed within each Byte for all DDR technologies.

  • DDR4: Byte swapping is allowed within each x64 Channel.

  • DDR5: Byte swapping is allowed within each x32 Channel

  • ECC bits swap is allowed within ECC byte/nibble: DDR4 ECC[7..0] and DDR5 ECC[3..0].