13th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2
Supporting 13th Generation Intel® Core™ Processor for S/P/PX/H/HX/U Processor Line Platforms, formerly known as Raptor Lake

ID 743844
Date 01/06/2023

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Document Table of Contents

Package Mechanical Attributes

The S Processor Lines use a Flip Chip technology available in a Land Grid Array (LGA) package. The following table provides an overview of the package mechanical attributes. For specific dimensions (die size, die location, and so on), refer to the processor package mechanical drawings.

S LGA Processor Package Mechanical Attributes

Package

Parameter

S LGA Processor Lines

Package Technology

Package Type

Flip Chip Land Grid Array

Interconnect

Land Grid Array (LGA)

Lead Free

N/A

Halogenated Flame Retardant Free

Yes

Package Configuration

Solder Ball Composition

N/A

Ball/Pin Count

1700

Grid Array Pattern

Grid Array

Land Side Capacitors

Yes

Die Side Capacitors

Yes

Die Configuration

Single Die Single-Chip Package with HIS

Package Dimensions

Nominal Package Size

45.0 x 37.5 mm

Z

Substrate Z=1.116 mm +/-0.95

Die Z is 0.37 mm

Minimum Ball/Pin pitch

0.8 mm

HX BGA Processor Package Mechanical Attributes

Package

Parameter

HX Processor Lines

Package Technology

Package Type

Flip Chip Ball Grid Array

Interconnect

Ball Grid Array (BGA)

Lead Free

N/A

Halogenated Flame Retardant Free

Yes

Package Configuration

Solder Ball Composition

Yes

Ball/Pin Count

1964

Grid Array Pattern

Grid Array

Land Side Capacitors

Yes

Die Side Capacitors

Yes (resistor/Capacitors)

Die Configuration

Single Die Single-Chip Package

Package Dimensions

Nominal Package Size

45.0 x 37.5 mm

Z

Substrate Z = 1.119+/-0.095 mm

2.005±0.114 (BOTTOM OF BGA TO TOP OF DIE)

Minimum Ball/Pin pitch

0.8 mm

P/H/U - Processor Package Mechanical Attributes

Package

Parameter

P/H/U Processor Line

Package Technology

Package Type

Flip Chip Ball Grid Array

Interconnect

Ball Grid Array (BGA)

Lead Free

Yes

Halogenated Flame Retardant Free

Yes

Package Configuration

Solder Ball Composition

SAC405

Ball/Pin Count

1744

Grid Array Pattern

Balls anywhere

Land Side Capacitors

Yes

Die Side Capacitors

No

Die Configuration

2 Dice Multi Chip package (MCP)

Package Dimensions

Nominal Package Size

25 x 50 mm

Z

Substrate Z = 0.594+/-0.08mm

1.185±0.096 (BOTTOM OF BGA TO TOP OF DIE)

Minimum Ball/Pin pitch

0.65 mm BP

PX - Processor Package Mechanical Attributes

Package

Parameter

PX Processor Line

Package Technology

Package Type

Flip Chip Ball Grid Array

Interconnect

Ball Grid Array (BGA)

Lead Free

Yes

Halogenated Flame Retardant Free

Yes

Package Configuration

Solder Ball Composition

SAC405

Ball/Pin Count

1792

Grid Array Pattern

Ball Anywhere

Land Side Capacitors

Yes

Die Side Capacitors

No

Die Configuration

2 Dice Multi Chip Package (MCP)

Package Dimensions

Nominal Package Size

25 X 40 mm

Z

Substrate Z= 0.594+/-0.08 mm

1.171±0.082 (Bottom of BGA to Top of Die)

Minimum Ball/Pin pitch

0.62 mm BP