12th Generation Intel® Core™ Processors
Datasheet, Volume 1 of 2
DRAM Reference Voltage Generation
Read Vref is generated by the memory controller in all technologies. Write Vref is generated by the DRAM in all technologies. Command Vref is generated by the DRAM in LPDDR4x/5.
The memory controller generates VrefCA per DIMM for DDR4. In all cases, it has small step sizes and is trained by MRC.