Intel® 800 Series Chipset Family Platform Controller Hub (PCH)
Datasheet, Volume 1 of 2
ALT Access Mode
Before entering a low power state, several registers from powered down parts may need to be saved. In the majority of cases, this is not an issue, as registers have read and write paths. However, several of the ISA compatible registers are either read only or write only. To get data out of write-only registers, and to restore data into read-only registers, the processor implements an ALT access mode.
If the ALT access mode is entered and exited after reading the registers of the timer (8254), the timer starts counting faster (13.5 ms). The following steps listed below can cause problems:
- BIOS enters ALT access mode for reading the processor timer related registers.
- BIOS exits ALT access mode.
- BIOS continues through the execution of other needed steps and passes control to the operating system.
After getting control in step #3, if the operating system does not reprogram the system timer again, the timer ticks may be happening faster than expected.
Operating systems reprogram the system timer and therefore do not encounter this problem.
For other operating systems, the BIOS should restore the timer back to 54.6 ms before passing control to the operating system. If the BIOS is entering ALT access mode before entering the suspend state it is not necessary to restore the timer contents after the exit from ALT access mode.
Write Only Registers with Read Paths in ALT Access Mode
The registers described in below table have read paths in ALT access mode. The access number field in the table indicates which register will be returned per access to that port.
| Restore Data | |||
|---|---|---|---|
| I/O Addr | # of Rds | Access | Data |
| 70h | 1 | Bit 7 = Read value is ‘0’. Bits [6:0] = RTC Address | |