Intel® 800 Series Chipset Family Platform Controller Hub (PCH)
Datasheet, Volume 1 of 2
| ID | Date | Version | Classification |
|---|---|---|---|
| 833778 | 02/06/2025 | Public |
Legal Disclaimer
Revision History
Introduction
PCH Controller Device IDs
Memory Mapping
Audio Voice and Speech
Ballout Definition
Connectivity Integrated (CNVi)
Controller Link
Direct Enhanced Serial Peripheral Interface (Direct eSPI)
Direct Media Interface (DMI)
Enhanced Serial Peripheral Interface (eSPI)
Gigabit Ethernet Controller
Host System Management Bus (SMBus) Controller
Integrated Sensor Hub (ISH)
Intel® Serial I/O Improved Inter-Integrated Circuit (I3C) Controllers
Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers
Intel® Serial I/O Universal Asynchronous Receiver/Transmitter (UART) Controllers
Intel® Serial IO Generic SPI (GSPI) Controllers
PCI Express* (PCIe*)
Real Time Clock (RTC)
Serial ATA (SATA)
Serial Peripheral Interface (SPI)
System Clocks
System Management Interface and SMLink
Touch Host Controller (THC)
Universal Serial Bus (USB)
General Purpose Input and Output
GPIO Serial Expander
Private Configuration Space Port ID
Security Firmware Engines
System Management
Testability and Monitoring
Miscellaneous Signals
Processor Sideband Signals
Power Delivery
Power Management
Thermal Sensor
Electrical Characteristics
Audio Voice and Speech
Intel® High Definition Audio (Intel® HD Audio) Controller Capabilities
Audio DSP Capabilities
Intel® High Definition Audio Interface Capabilities
Direct Attached Digital Microphone (PDM) Interface
USB Audio Offload Support
I2S / PCM Interface
Intel® Display Audio Interface
MIPI® SoundWire* Interface
Signal Description
Integrated Pull-Ups and Pull-Downs
I/O Signal Planes and States
Functional Description
Configuration Flow
PCH Direct eSPI Registers
PCH Direct eSPI Reset Handling
PCH Direct eSPI Peripheral Channel Support
PCH Direct eSPI VW Channel Support
PCH Direct eSPI OOB Channel Support
PCH Direct eSPI Flash Channel Support
PCH eSPI Switch
Flash Descriptor Address Swapping
Private Configuration Space Port ID
The PCH incorporates a wide variety of devices and functions. The registers within these devices are mainly accessed through the primary interface, such as PCI configuration space and IO/MMIO space. Some devices also have registers that are distributed within the Private Configuration Space at individual endpoints (Target Port IDs) which are only accessible through the Sideband Interface. These Private Configuration Space Registers can be addressed via SBREG_BAR or through SBI Index Data pair programming.
| Device/Function Type | Target Port ID (hex) |
|---|---|
| DCI | B8h |
| General Purpose I/O (GPIO) Community 0 | 6Eh |
| General Purpose I/O (GPIO) Community 1 | 6Dh |
| General Purpose I/O (GPIO) Community 2 | 6Ch |
| General Purpose I/O (GPIO) Community 3 | 6Bh |
| General Purpose I/O (GPIO) Community 4 | 6Ah |
| General Purpose I/O (GPIO) Community 5 | 69h |
| SATA | D9h |
| SMBus | C6h |
| eSPI / SPI | 72h |
| xHCI | 70h |
| USB 3.2 Gen 1x1 Dual Role (xDCI) | 71h |