12th Generation Intel® Core™ Processors
Datasheet, Volume 1 of 2
Remote Action Request
Remote Action Request (RAR) enables a significant speed up of several inter-processor operations by moving such operations from software (OS or application) to hardware.
The main feature is the speedup of TLB shootdowns.
A single RAR operation can invalidate multiple memory pages in the TLB.
A TLB (Translation Lookaside Buffer) is a per-core cache that holds mappings from virtual to physical addresses.
A TLB shootdown is the process of propagating a change in memory mapping (page table entry) to all the cores.
- Page Invalidation: imitates the operation of performing INVLPG instructions corresponding or the TLB invalidation corresponding with “MOV CR3 / CR0”
- Page Invalidation without CR3 Match: identical to “Page invalidation”, except that the processor does not check for a CR3 match
- PCID Invalidation: imitates the operation of performing INVPCID instructions
- EPT Invalidation: imitates the operation of performing INVEPT instructions
- VPID Invalidation: imitates the operation of performing INVVPID instructions
- MSR Write: imitates the operation of WRMSR instructions on all cores