Intel® 500 Series Chipset Family PCH Datasheet Volume 1

Datasheet

ID Date Version Classification
635218 30/09/2021 00:00:00 006 Public Content
Document Table of Contents
ICC

PCH H

Flexible HSIO Lane Multiplexing in PCH-H

Note:The PCH Flexible I/O Lane support will vary depending on the PCH SKU. Refer to the PCH SKU details in SKU Definition.

The 38 Flexible HSIO Lanes on PCH-H support the following configurations:

  1. Up to 24 PCIe* Lanes
    • A maximum of sixteen PCIe* Root Ports (or devices) can be enabled
      • When a GbE Port is enabled, the maximum number of PCIe* Root Ports (or devices) that can be enabled reduces based off the following:

        --> Max PCIe* Root Ports (or devices) = 16 - GbE (0 or 1)

    • PCIe* Lanes 1-4 (PCIe* Controller #1), 5-8 (PCIe* Controller #2), 9-12 (PCIe* Controller #3), 13-16 (PCIe* Controller #4), 17-20 (PCIe* Controller #5), and 21-24 (PCIe* Controller #6) must be individually configured.
  2. Supports Remapped (Intel® Rapid Storage Technology) PCIe* Storage Devices
    • Specific PCIe* lanes can be used for a x2 or x4 Intel® Rapid Storage Technology Remapped PCIe* NVMe SSD or a x2 or x4 Next Generation Intel® Optane™ Memory Device.
    • Not all PCH PCIe* lanes support Intel® RST for PCIe* Storage Devices. Refer to the PCH SKU details in SKU Definition for specific PCH SKU PCIe* lane support
  3. Up to eight SATA Lanes
    • A maximum of eight SATA Ports (or devices) can be enabled.
  4. Up to ten USB 3.2 Gen 1x1/2x1 Lanes
    • A maximum of ten USB 3.2 Gen 1x1/2x1 Ports (or devices) can be enabled.
    • USB 3.2  Gen 1x1 = 5 GT\s
    • USB 3.2  Gen 2x1 = 10 GT\s
  5. Up to six USB 3.2 Gen 2x2 Lanes
    • A maximum of three USB 3.2 Gen 2x2 Ports (or devices) can be enabled when paired with a 11th Generation Intel® Core™ Processor Desktop.
    • USB 3.2  Gen 2x2 = 20 GT\s
  6. Up to four GbE Lanes
    • A maximum of one GbE Port (or device) can be enabled.
  7. Up to eight DMI Lanes for x4 and x8 support
  8. Un-used USB 3.2/PCIe and SATA/PCIe Combo Port Lanes must be statically assigned to "PCIe, SATA, or USB3" through their Combo Port Soft Straps discussed in the SPI Programming Guide using the Intel Flash Image Tool (FIT).