| USB31_1_RXN USB31_1_RXP | I | USB 3.2 Differential Receive Pair 1: These are USB 3.2-based high-speed differential signals for Port 1. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_1_TXN USB31_1_TXP | O | USB 3.2 Differential Transmit Pair 1: These are USB 3.2-based high-speed differential signals for Port 1. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_2_RXN USB31_2_RXP | I | USB 3.2 Differential Receive Pair 2: These are USB 3.2-based high-speed differential signals for Port 2. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_2_TXN USB31_2_TXP | O | USB 3.2 Differential Transmit Pair 2: These are USB 3.2-based high-speed differential signals for Port 2. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_3_RXN USB31_3_RXP | I | USB 3.2 Differential Receive Pair 3: These are USB 3.2-based high-speed differential signals for Port 3. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_3_TXN USB31_3_TXP | O | USB 3.2 Differential Transmit Pair 3: These are USB 3.2-based high-speed differential signals for Port 3. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_4_RXN USB31_4_RXP | I | USB 3.2 Differential Receive Pair 4: These are USB 3.2-based high-speed differential signals for Port 4. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_4_TXN USB31_4_TXP | O | USB 3.2 Differential Transmit Pair 4: These are USB 3.2-based high-speed differential signals for Port 4. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_5_RXN USB31_5_RXP | I | USB 3.2 Differential Receive Pair 5: These are USB 3.2-based high-speed differential signals for Port 5. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_5_TXN USB31_5_TXP | O | USB 3.2 Differential Transmit Pair 5: These are USB 3.2-based high-speed differential signals for Port 5. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_6_RXN USB31_6_RXP | I | USB 3.2 Differential Receive Pair 6: These are USB 3.2-based high-speed differential signals for Port 6. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB31_6_TXN USB31_6_TXP | O | USB 3.2 Differential Transmit Pair 6: These are USB 3.2-based high-speed differential signals for Port 6 . The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE1_RXN / USB31_7_RXN PCIE1_RXP / USB31_7_RXP | I | USB 3.2 Differential Receive Pair 7: These are USB 3.2-based high-speed differential signals for Port 7. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE1_TXN / USB31_7_TXN PCIE1_TXP / USB31_7_TXP | O | USB 3.2 Differential Transmit Pair 7: These are USB 3.2-based high-speed differential signals for Port 7. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE2_RXN / USB31_8_RXN PCIE2_RXP / USB31_8_RXP | I | USB 3.2 Differential Receive Pair 8: These are USB 3.2-based high-speed differential signals for Port 8. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE2_TXN / USB31_8_TXN PCIE2_TXP / USB31_8_TXP | O | USB 3.2 Differential Transmit Pair 8: These are USB 3.2-based high-speed differential signals for Port 8. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE3_RXN / USB31_9_RXN PCIE3_RXP / USB31_9_RXP | I | USB 3.2 Differential Receive Pair 9: These are USB 3.2-based high-speed differential signals for Port 9. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE3_TXN / USB31_9_TXN PCIE3_TXP / USB31_9_TXP | O | USB 3.2 Differential Transmit Pair 9: These are USB 3.2-based high-speed differential signals for Port 9. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE4_RXN / USB31_10_RXN PCIE4_RXP / USB31_10_RXP | I | USB 3.2 Differential Receive Pair 10: These are USB 3.2-based high-speed differential signals for Port 10. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| PCIE4_TXN / USB31_10_TXN PCIE4_TXP / USB31_10_TXP | O | USB 3.2 Differential Transmit Pair 10: These are USB 3.2-based high-speed differential signals for Port 10. The signal should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_1 USB2N_1 | I/O | USB 2.0 Port 1 Transmit/Receive Differential Pair 1: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_2 USB2N_2 | I/O | USB 2.0 Port 2 Transmit/Receive Differential Pair 2: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_3 USB2N_3 | I/O | USB 2.0 Port 3Transmit/Receive Differential Pair 3: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_4 USB2N_4 | I/O | USB 2.0 Port 4 Transmit/Receive Differential Pair 4: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_5 USB2N_5 | I/O | USB 2.0 Port 5 Transmit/Receive Differential Pair 5: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_6 USB2N_6 | I/O | USB 2.0 Port 6 Transmit/Receive Differential Pair 6: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_7 USB2N_7 | I/O | USB 2.0 Port 7 Transmit/Receive Differential Pair 7: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_8 USB2N_8 | I/O | USB 2.0 Port 8 Transmit/Receive Differential Pair 8: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_9 USB2N_9 | I/O | USB 2.0 Port 9 Transmit/Receive Differential Pair 9: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_10 USB2N_10 | I/O | USB 2.0 Port 10 Transmit/Receive Differential Pair 10: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_11 USB2N_11 | I/O | USB 2.0 Port 11 Transmit/Receive Differential Pair 11: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_12 USB2N_12 | I/O | USB 2.0 Port 12 Transmit/Receive Differential Pair 12: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_13 USB2N_13 | I/O | USB 2.0 Port 13 Transmit/Receive Differential Pair 13: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| USB2P_14 USB2N_14 | I/O | USB 2.0 Port 14 Transmit/Receive Differential Pair 14: This USB 2.0 signal pair are routed to xHCI controller and should be mapped to a USB connector with one of the OC (overcurrent) signals. |
| GPP_E9 / USB_OC0# | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
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| GPP_E10 / USB_OC1# | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_E11 / USB_OC2# | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_E12 / USB_OC3# | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_I11 / USB_OC4# / I2C4_SDA | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_I12 / USB_OC5# / I2C4_SCL | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_I13 / USB_OC6# / I2C5_SDA | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
|
| GPP_I14 / USB_OC7# / I2C5_SCL | I | Overcurrent Indicators: This signal set the corresponding bit in the xHCI controller to indicate that an overcurrent condition has occurred. When configured as OC# pin, a 10 kΩ pull-up resistor is required to be connected to the power-rail. When this pin is configured as GPIO, no pull-up resistor is required. - OC# pins are not 5V tolerant.
- OC# pins can be shared between USB ports.
- Each USB connector should only have one OC# pin protection..
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| USB_VBUSSENSE | I | VBUS Sense for USB Device mode. This HW signal is not used on the PCH for USB device mode functionality. This signal should be connected to ground. |
| USB_ID | I | ID detect for USB Device mode. This HW signal is not used on the PCH for dual role mode selection. The switching of USB port role is done through message from EC/PD over the SMLink1 . This signal should be connected to ground. |
| USB2_COMP | I | USB Resistor Bias, analog connection point for an external resistor 113 Ω ± 1% connected to GND. |