Intel® Core™ Ultra 200S, Intel® Core™ Ultra 200S Plus ,Intel® Core™ Ultra 200HX and 200HX Plus Series Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
832586 03/17/2026 Public
Document Table of Contents
LAM

VccGT DC Specifications

Processor VCCGT Supply DC Voltage and Current Specifications (S Processor Line)

Segment Symbol Parameter Minimum Typical Maximum Unit Note 1
All S Processor Line VCCGT Operating Voltage Active Voltage Range for VccGT 0 - 1.52 V 2, 3, 5, 7
8P+16E Core 125W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+12E Core 125W IccMaxVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+8E Core 125W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+16E Core 65W IccMaxVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+12E Core 65W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+8E Core 65W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+4E Core 65W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 30 A 5
8P+16E Core 35W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+12E Core 35W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+8E Core 35W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+4E Core 35W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 30 A 5

PS0, PS1 ,PS2, PS3

TOBVCCGT VCCGT DC Voltage Tolerance - - ±20 mV 3,4
PS0, PS1, PS2, PS3 TOBVCCGT+Ripple VCCGT DC + Ripple Voltage Tolerance - - -35 /+50 mV 3, 4
All S Processor Line DC_​LL VCCGT DC Loadline - - 4.3 6,8
All S Processor Line AC_​LL VCCGT AC Loadline - -
  • Below 700kHz: 4.3mOhms.

  • 700kHz -800kHz: linear decrease with log(frequency) from 4.3mOhms to 4.1mOhms.

  • Above 800kHz: 4.1mOhms.

6,8,9
All S Processor Line V_​OVS_​MAX VCCGT Max Overshoot Allowance from IccMAX - - 70 mV
All S Processor Line T_​OVS_​MAX VCCGT Max Overshoot Time from IccMAX - - 10 µs
Notes:
  1. All specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date.
  2. Maximum operating voltage given for motherboard design purposes. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Adaptive Thermal Monitor, Enhanced Intel Speed-step Technology, or low-power states). Failure of product operation, including potential irreversible damage to the part, can occur from operating the part at voltages above the individual VID that is programmed.
  3. The voltage specification requirements are measured across VccGT_​SENSE and VssGT_​SENSE as near as possible to the processor. The measurement needs to be performed with a 20MHz bandwidth limit on the oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.
  4. PSx refers to the voltage regulator power state as set by the SVID protocol. Refer to the IMVP9.2 Specification for more information.
  5. Operating voltage range in steady state.
  6. LL spec values should not be exceeded. If exceeded, power, performance and a reliability penalty are expected.
  7. Load Line measured at the sense point.
  8. Ripple can be higher if DC TOB is below 20mV, as long as Total TOB is within TOBVCCGT+Ripple spec.

Processor VCCGT Supply DC Voltage and Current Specifications (HX Processor Line)

Segment Symbol Parameter Minimum Typical Maximum Unit Note 1
All HX Processor Line VCCGT Operating Voltage Active Voltage Range for VccGT 0 - 1.52 V 2, 3, 5, 7
8P+16E Core 55W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+12E Core 55W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+8E Core 55W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
PS0, PS1 ,PS2, PS3 TOBVCCGT VCCGT DC Voltage Tolerance - - ±20 mV 3,4
PS0, PS1, PS2, PS3 TOBVCCGT+Ripple VCCGT DC + Ripple Voltage Tolerance - - -35 /+50 mV 3, 4
All HX Processor Line DC_​LL VCCGT DC Loadline - - 4.4 6,8
All HX Processor Line AC_​LL VCCGT AC Loadline - - 4.4 6,8,9
All HX Processor Line V_​OVS_​MAX VCCGT Max Overshoot Allowance from IccMAX - - 70 mV
All HX Processor Line T_​OVS_​MAX VCCGT Max Overshoot Time from IccMAX - - 10 µs
Notes:
  1. All specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date.
  2. Maximum operating voltage given for motherboard design purposes. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Adaptive Thermal Monitor, Enhanced Intel Speed-step Technology, or low-power states). Failure of product operation, including potential irreversible damage to the part, can occur from operating the part at voltages above the individual VID that is programmed.
  3. The voltage specification requirements are measured across VccGT_​SENSE and VssGT_​SENSE as near as possible to the processor. The measurement needs to be performed with a 20MHz bandwidth limit on the oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.
  4. PSx refers to the voltage regulator power state as set by the SVID protocol. Refer to the IMVP9.2 Specification for more information.
  5. Operating voltage range in steady state.
  6. LL spec values should not be exceeded. If exceeded, power, performance and a reliability penalty are expected.
  7. Load Line measured at the sense point.
  8. Ripple can be higher if DC TOB is below 20mV, as long as Total TOB is within TOBVCCGT+Ripple spec.

Processor VCCGT Supply DC Voltage and Current Specifications (S-Plus Processor Line)

Segment Symbol Parameter Minimum Typical Maximum Unit Note 1
All S-Plus Processor Line VCCGT Operating Voltage Active Voltage Range for VccGT 0 - 1.52 V 2, 3, 5, 7
8P+16E Core 125W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
6P+12E Core 125W IccMaxVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5

PS0, PS1 ,PS2, PS3

TOBVCCGT VCCGT DC Voltage Tolerance - - ±20 mV 3,4
PS0, PS1, PS2, PS3 TOBVCCGT+Ripple VCCGT DC + Ripple Voltage Tolerance - - -35 /+50 mV 3, 4
All S-Plus Processor Line DC_​LL VCCGT DC Loadline - - 4.3 6,8
All S-Plus Processor Line AC_​LL VCCGT AC Loadline - -
  • Below 700kHz: 4.3mOhms.

  • 700kHz -800kHz: linear decrease with log(frequency) from 4.3mOhms to 4.1mOhms.

  • Above 800kHz: 4.1mOhms.

6,8,9
All S-Plus Processor Line V_​OVS_​MAX VCCGT Max Overshoot Allowance from IccMAX - - 70 mV
All S-Plus Processor Line T_​OVS_​MAX VCCGT Max Overshoot Time from IccMAX - - 10 µs
Notes:
  1. All specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date.
  2. Maximum operating voltage given for motherboard design purposes. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Adaptive Thermal Monitor, Enhanced Intel Speed-step Technology, or low-power states). Failure of product operation, including potential irreversible damage to the part, can occur from operating the part at voltages above the individual VID that is programmed.
  3. The voltage specification requirements are measured across VccGT_​SENSE and VssGT_​SENSE as near as possible to the processor. The measurement needs to be performed with a 20MHz bandwidth limit on the oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.
  4. PSx refers to the voltage regulator power state as set by the SVID protocol. Refer to the IMVP9.2 Specification for more information.
  5. Operating voltage range in steady state.
  6. LL spec values should not be exceeded. If exceeded, power, performance and a reliability penalty are expected.
  7. Load Line measured at the sense point.
  8. Ripple can be higher if DC TOB is below 20mV, as long as Total TOB is within TOBVCCGT+Ripple spec.

Processor VCCGT Supply DC Voltage and Current Specifications (HX-Plus Processor Line)

Segment Symbol Parameter Minimum Typical Maximum Unit Note 1
All HX-Plus Processor Line VCCGT Operating Voltage Active Voltage Range for VccGT 0 - 1.52 V 2, 3, 5, 7
8P+16E Core 55W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
8P+12E Core 55W IccMAXVCCGT Max. Current for VCCGT Processor Rail - - 40 A 5
PS0, PS1 ,PS2, PS3 TOBVCCGT VCCGT DC Voltage Tolerance - - ±20 mV 3,4
PS0, PS1, PS2, PS3 TOBVCCGT+Ripple VCCGT DC + Ripple Voltage Tolerance - - -35 /+50 mV 3, 4
All HX-Plus Processor Line DC_​LL VCCGT DC Loadline - - 4.4 6,8
All HX-Plus Processor Line AC_​LL VCCGT AC Loadline - - 4.4 6,8,9
All HX-Plus Processor Line V_​OVS_​MAX VCCGT Max Overshoot Allowance from IccMAX - - 70 mV
All HX-Plus Processor Line T_​OVS_​MAX VCCGT Max Overshoot Time from IccMAX - - 10 µs
Notes:
  1. All specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date.
  2. Maximum operating voltage given for motherboard design purposes. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Adaptive Thermal Monitor, Enhanced Intel Speed-step Technology, or low-power states). Failure of product operation, including potential irreversible damage to the part, can occur from operating the part at voltages above the individual VID that is programmed.
  3. The voltage specification requirements are measured across VccGT_​SENSE and VssGT_​SENSE as near as possible to the processor. The measurement needs to be performed with a 20MHz bandwidth limit on the oscilloscope, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.
  4. PSx refers to the voltage regulator power state as set by the SVID protocol. Refer to the IMVP9.2 Specification for more information.
  5. Operating voltage range in steady state.
  6. LL spec values should not be exceeded. If exceeded, power, performance and a reliability penalty are expected.
  7. Load Line measured at the sense point.
  8. Ripple can be higher if DC TOB is below 20mV, as long as Total TOB is within TOBVCCGT+Ripple spec.