12th Generation Intel® Core™ Processors Datasheet Volume 2 of 2
Interrupt Information Byte 1 (INTRB1) – Offset 3D
Interrupt Information Byte 1
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
7:0 | 0x1 | RO/V | Interrupt Pin (IPIN) Indicates the interrupt pin driven by the root port. At reset, this register takes on the following values, which reflect the reset state of the STRPFUSECFG.PxIP field: |