Signal Description

Display is divided between processor and PCH. The processor houses memory interface, display planes, pipes, and digital display interfaces/ports while the PCH has transcoder and analog display interface or port.

The PCH integrates digital display side band signals AUX CH, DDC bus, and Hot-Plug Detect signals even though digital display interfaces are moved to processor. There are two pairs of AUX CH, DDC Clock/Data, and Hot-Plug Detect signals on the PCH that correspond to digital display interface/ports.

Auxiliary Channel (AUX CH) is a half-duplex bidirectional channel used for link management and device control. AUX CH is an AC coupled differential signal.

The DDC (Digital Display Channel) bus is used for communication between the host system and display. Seven pairs of DDC (DDP*_​CTRLCLK and DDP*_​CTRLDATA) signals exist on the PCH that correspond to seven digital ports on the processor. DDC follows I²C protocol.

The Hot-Plug Detect (HPD) signal serves as an interrupt request for the sink device for DisplayPort* and HDMI*. DDC and HDP signals are tied to power rail VCCPGPPIR. Depending on the voltage supplied to the VCCPGPPIR power pins, the signals can be 1.8 V or 3.3 V signaling signals.