12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID 655258
Date 06/15/2023
Document Table of Contents

Package C-States and Display Resolutions

The integrated graphics engine has the frame buffer located in system memory. When the display is updated, the graphics engine fetches display data from system memory. Different screen resolutions and refresh rates have different memory latency requirements. These requirements may limit the deepest Package C-state the processor can enter. Other elements that may affect the deepest Package C-state available are the following:

  • Display is on or off
  • Single or multiple displays
  • Native or non-native resolution
  • Panel Self Refresh (PSR) technology

Note:Display resolution is not the only factor influencing the deepest Package C-state the processor can get into. Device latencies, interrupt response latencies, and core C-states are among other factors that influence the final package C-state the processor can enter.