Processor Power Rails

12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

Download as PDF

ID 655258

Date 06/15/2023

Version

Processor Power Rails Signals

Signal Name	Description	Dir.	Buffer Type	Link Type	Availability
VCCCORE	Processor IA Cores and Ring power rail	I	PWR	—	All Processor Line
VCCGT	Processor Graphics power rail	I	PWR	—	All Processor Line
VCCSA	Processor System Agent power rail	I	PWR		U9 Processor Line
VCCANA	Support internal Analog rails, TCSS, Display, PCIE and other internal Blocks	I	PWR		U9 Processor Line
VCCIN_AUX	Support internal FIVR’s, SA, PCIe, Display IO and other internal Blocks.	I	PWR	—	All Processor Line
VCCIN_AUX_FLTR	Support internal FIVR’s, SA, PCIe, Display IO and other internal Blocks. this pin should be connected to decoupling for filter.	I	PWR	—	All Processor Line
VCC1P05_PROC	Sustain and Sustain Gated Power Rail	I	PWR	—	All Processor Line
VCC1P8_PROC	PCIE PHY Power 1.8V Rail	I	PWR	—	S Processor Line H Processor Line P Processor Line U15 Processor Line
VDD2	System Memory power rail	I	PWR	—	All Processor Line
VDD2_EDGECAP	Internal power pin, this pin should be connected to a decoupling capacitor and ground	I	PWR	—	S Processor Line
VCCIN_AUX_EDGECAP	Internal power pin, this pin should be connected to a decoupling capacitor and ground	I	PWR	—	S Processor Line
VDD2_DDR5_SENSE	Isolated, low impedance DDR5 voltage sense pins.	N/A	PWR_ SENSE	—	S Processor Line
VCCGT_SENSE	Isolated, low impedance voltage sense pins. They can be used to sense or measure voltage near the silicon.	N/A	PWR_ SENSE	—	All Processor Line
VCC_SENSE					All Processor Line
VCCIN_AUX_SENSE / VCCINAUX_SENSE					All Processor Line
VCC1P05_PROC_SENSE					S Processor Line
VCCSA_SENSE	Isolated, low impedance voltage sense pins. They can be used to sense or measure voltage near the silicon.	N/A	PWR_ SENSE	—	U9 Processor Line
VCCANA_SENSE		N/A	PWR_ SENSE	—	U9 Processor Line
VCC1P05_PROC_OUT	VCC1P05_PROC_OUT is the power provider to the balls AR14 and AT12, so those three balls should be connected at board level.	O	PWR	—	H Processor Line P Processor Line U Processor Line
VCC_DISPIO	DDI PHY power rail (Shorted on package): Note:When no MIPI DSI interface is been used (only eDP), VCC_DISPIO should be shorted with VCC1P05_PROC_OUT, VCC_MIPILP can be left N.C. Note:When MIPI DSI interface is been used, VCC_MIPILP should be connected to 1.24v (on board VR), VCC_DISPIO can be left N.C.	I	PWR	—	H Processor Line P Processor Line U Processor Line
VCC_MIPILP		I	PWR	—	H Processor Line P Processor Line U Processor Line

Processor Ground Rails Signals

Signal Name	Description	Dir.	Buffer Type	Link Type	Availability
VSSGT_SENSE	Isolated, low impedance Ground sense pins. They can be used for the reference ground near the silicon.	N/A	GND_ SENSE	—	All Processor Line
VSS_SENSE
VSSIN_AUX_SENSE / VSSINAUX_SENSE
VSSSA_SENSE	Isolated, low impedance Ground sense pins. They can be used for the reference ground near the silicon.	N/A	GND_ SENSE	—	U9 Processor Line
VSSANA_SENSE		N/A	GND_ SENSE		U9 Processor Line