Native Function and TERM Bit Setting

Certain native function signals that are muxed onto GPIO pins support dynamic termination override, which allows the native controller to dynamically control the integrated pull-up / pull-down resistors on the signals. For those native function signals, when used, software must program the TERM bit field in the corresponding GPIO’s Pad Configuration DW1 to 1111b. Refer to Volume 2 for information on the PAD configuration DW1 register and the TERM bit field. The table below shows the native function signals that support dynamic termination override:

Native Function Signals Supporting Dynamic Termination Override

Native Function	Signal With Dynamic Termination Override
Intel^®HD Audio	HDA_SDI[0:1], HDA_SDO, HDA_SYNC, HDACPU_SDI, HDACPU_SDO, I2S[5:0]_SCLK, I2S[5:0]_SFRM, I2S[5:0]_RXD, DMIC_DATA[1:0], SNDW[3:0]_DATA
Power Management	ACPRESENT, LAN_WAKE#
Touch Host Controller (THC)	THC0_SPI1_IO[3:0], THC0_SPI2_IO[3:0] THC1_SPI2_IO[3:0]

Native Function

Signal With Dynamic Termination Override

Intel^®HD Audio

HDA_SDI[0:1], HDA_SDO, HDA_SYNC, HDACPU_SDI, HDACPU_SDO, I2S[5:0]_SCLK, I2S[5:0]_SFRM, I2S[5:0]_RXD, DMIC_DATA[1:0], SNDW[3:0]_DATA

Power Management

ACPRESENT, LAN_WAKE#

Touch Host Controller (THC)

THC0_SPI1_IO[3:0],

THC0_SPI2_IO[3:0]

THC1_SPI2_IO[3:0]

Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers

GPIO Ownership Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers