| VCCSA | Active Voltage Range for Vcc SA | All S-Processor Line | 0 | - | 1.52 | V | 1,2,3,7 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+16E Core 125W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+12E Core 125W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 6P+8E Core 125W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+16E Core 65W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+12E Core 65W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 6P+8E Core 65W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 6P+4E Core 65W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+16E Core 35W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 8P+12E Core 35W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 6P+8E Core 35W | 0 | — | 39 | A | 1,2 |
| IccMAX_SA | Max. Current for Processor System Agent Rail | S-Processor Line 6P+4E Core 35W | 0 | — | 39 | A | 1,2 |
| TOBVCCSA | DC Voltage Tolerance | S - Processor Line PS0, PS1 ,PS2, PS3 | — | — | ±20 | mV | 1,3,6 |
| TOB VCCSA +Ripple | DC + Ripple Voltage Tolerance | S Processor Lines: PS0, PS1, PS2, PS3 | — | — | -35 /+50 | mV | 3, 6, 8,16 |
| DC_LL | DC Loadline | S -Processor Line | — | — | 5.9 | mΩ | 4,5 |
| AC_LL | AC Loadline | S Processor Line | — | — | - Below 400KHz: 5.9mOhms
- 400kHz -1500kHz: linear decrease with log(frequency) from 5.9mOhms to 4mOhms.
- Above 1500kHz: 4mOhms
| mΩ | 4,5 |
| V_OVS_MAX | Max Overshoot Allowance from IccMAX | All | - | - | 70 | mV | |
| T_OVS_MAX | Max Overshoot Time from IccMAX | All | - | - | 10 | µs | |
- All specifications in this table are based on estimates and simulations or empirical data. These specifications will be updated with characterized data from silicon measurements at a later date.
- Maximum operating voltage given for motherboard design purposes. Each processor is programmed with a maximum valid voltage identification value (VID) that is set at manufacturing and cannot be altered. Individual maximum VID values are calibrated during manufacturing such that two processors at the same frequency may have different settings within the VID range. Note that this differs from the VID employed by the processor during a power management event (Adaptive Thermal Monitor, Enhanced Intel Speed-step Technology, or low-power states). Failure of product operation, including potential irreversible damage to the part, can occur from operating the part at voltages above the individual VID that is programmed.
- Long term reliability cannot be assured in conditions above or below Maximum/Minimum functional limits.
- The voltage specification requirements are measured on package pins as near as possible to the processor with an oscilloscope set to 100 MHz bandwidth, 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled into the oscilloscope probe.
- LL measured at sense points. LL specification values should not be exceeded. If exceeded, power, performance, and reliability penalty are expected.
- The LL values are for reference. Must still need to meet the voltage tolerance specification.
- Voltage Tolerance budget values Include ripples
- VccSA is having few point of voltage define by CPU VID
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