12th Generation Intel® Core™ Processors Datasheet, Volume 1 of 2


ID 655258
Date 28/10/2021 00:00:00
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DRAM Reference Voltage Generation

Read Vref is generated by the memory controller in all technologies. Write Vref is generated by the DRAM in all technologies. The memory controller generates VrefCA per DIMM for DDR4. In all cases, it has small step sizes and is trained by MRC.