12th Generation Intel® Core™ Processors Datasheet, Volume 1 of 2

Datasheet

ID 655258
Date 28/10/2021 00:00:00
Public Content

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Document Table of Contents

Processor SKU Support Matrix

DDR Support Matrix Table

Technology

DDR4

DDR5

Processor S LGA S LGA S LGA S LGA
Configuration 1DPC 2DPC 10 1DPC 2DPC 10
Maximum Frequency [MT/s]

S LGA

UDIMM 3200

S LGA

UDIMM 3200

S LGA

SoDIMM 4800

S LGA:

UDIMM 4800

S LGA UDIMM :

1 DIMM - 4400,

2 DIMMs 1R - 4000,

2 DIMMs 2R - 3600

VDDQ [V] 6

1.2

5,1.19

VDD2 [V] 6

1.2

1.1

Maximum RPC 2

2 4 2 4

Die Density [Gb]

8,16 8,16 16
Ballmap Mode 11 IL /NIL IL /NIL S LGA - IL NIL

Notes:

  1. 1DPC refer to when only 1DIMM slot per channel is routed.
  2. RPC = Rank Per Channel
  3. Memory down of all technologies should be implemented homogeneous means that all DRAM devices should be from the same vendor and have the same part number. Implementing a mix of DRAM devices may cause serious signal integrity and functional issues.
  4. There is no support for memory modules with different technologies or capacities on opposite sides of the same memory module. If one side of a memory module is populated, the other side is either identical or empty.
  5. VDD2 is Processor and DRAM voltage, and VDDQ is DRAM voltage.
  6. Pending DRAM samples availability.
  7. Mix DIMM in 2DPC use 2N Command Mode with 1 or 2 speed bins below Max Speed, speed to be set in BIOS per margin check.
  8. 5V is SODIMM/UDIMM voltage, 1.1V is Memory down voltage.
  9. DDR4/DDR5 SoDIMM 2DPC - Not supported on S LGA processor line .
  10. IL/NIL mode depends on Memory topology.

DDR Technology Support Matrix

Technology

Form Factor

Ball Count

Processor

DDR4

SoDIMM

260

S

DDR5

SoDIMM

262

S

DDR5

UDIMM

288

S