12th Generation Intel® Core™ Processors Datasheet, Volume 1 of 2


ID 655258
Date 28/10/2021 00:00:00
Public Content

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

PCI Express* Configuration Mechanism

The PCI Express* (external graphics) link is mapped through a PCI-to-PCI bridge structure.

PCI Express* Related Register Structures in the Processor

The PCI Express* Host Bridge is required to translate the memory-mapped PCI Express* configuration space accesses from the host processor to PCI Express* configuration cycles. To maintain compatibility with PCI configuration addressing mechanisms, it is recommended that system software access the enhanced configuration space using 32-bit operations (32-bit aligned) only. Refer to the PCI Express Base Specification for details of both the PCI-compatible and PCI Express* Enhanced configuration mechanisms and transaction rules.