12th Generation Intel® Core™ Processors Datasheet, Volume 1 of 2

Datasheet

ID 655258
Date 28/10/2021 00:00:00
Public Content

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Signal Description

This chapter describes the processor signals. They are arranged in functional groups according to their associated interface or category. The notations in the following table are used to describe the signal type.

The signal description also includes the type of buffer used for the particular signal (refer to the following table).

Signal Tables Terminology 

Notation

Signal Type

I

Input pin

O

Output pin

I/O

Input/Output, Bi-directional pin

SE

Single Ended Link

Diff

Differential Link

CMOS

CMOS buffers. 1.05 V- tolerant

OD

Open Drain buffer

DDR4

DDR4 buffers: 1.2 V-tolerant

DDR5

DDR5 buffers: 1.1 V-tolerant

A

Analog reference or output. May be used as a threshold voltage or for buffer compensation

GTL

Gunning Transceiver Logic signaling technology

Ref

Voltage Reference signal

Availability

Signal Availability condition - based on segment, SKU, platform type or any other factor

Asynchronous 1

Signal has no timing relationship with any reference clock.

Note:Qualifier for a buffer type.