SoundWire x AC Timing Control (SNDW2ACTMCTL) – Offset 4600e - 001 - ID:872352 | Intel® Core™ Ultra Series 3 Processors I/O Registers

Intel® Core™ Ultra Series 3 Processors I/O Registers

ID	Date	Version	Classification
872352	04/14/2026	001	Public

SoundWire x AC Timing Control (SNDW2ACTMCTL) – Offset 4600e

This register controls the SoundWire link AC Timings.

Bit Range	Default	Access	Field Name and Description
15	0h	RW	Clock Loopback Delay Enable (CLDE) When set, it enables the clock loopback delay programmability (per CLDS). When cleared, the clock loopback is bypassing the programmable delay (i.e. legacy clock doubler implementation).
14	0h	RW	Data On Active Interval Select Extension 2 (DOAISE2) Select of active time of SoundWire data buffer after having been enabled. This value affects tOH_Selftimed(min) and that in turn affects tZD(max). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. This register combine with DOAIS to get the effective value. 0 - Only DOAISE & DOAIS are applicable for select value - Default 1 - DOAISE2 & DOAISE & DOAIS are combine for select value [DOAISE2_DOAISE_DOAIS] 1_0_00 - 11 clock periods 1_0_01 - 12 clock periods ... 1_1_10 - 17 clock periods 1_1_11 - Reserved Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
13:12	0h	RW	Data On Delay Select Extension 2 (DODSE2) Delay select for turning on SoundWire Data buffer, tZD(min). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. This register combine with DODSE & DODS to get the effective value. 0 - Only DODSE & DODS are applicable for select value >0 - DODSE2 & DODSE & DODS are combine for select value [DODSE2_DODSE_DODS] 01_0_0 - 7 clock periods 01_0_1 - 8 clock periods ... 11_1_0 - 17 clock periods 11_1_1 - Reserved Note that due to synchronizer uncertainty, the effective delay may result in either the programmed count or the programmed count minus 1. Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
11:7	0h	RW	Clock Loopback Delay Select (CLDS) Select of clock loopback delay time feeding to the RX clock doubler. Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. 0h - 3 clock periods 1h - 4 clock periods ... 0Eh - 17 clock periods > 0Eh - Reserved Note that due to synchronizer uncertainty, the effective delay may result in either the programmed count or the programmed count minus 1.
6	0h	RW	Clock Loopback Source Select (CLSS) Select the source of the clock loopback 0: external loopback 1: internal loopback
5	1h	RW	Data On Active Interval Select Extension (DOAISE) Select of active time of SoundWire data buffer after having been enabled. This value affects tOH_Selftimed(min) and that in turn affects tZD(max). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. This register combine with DOAIS to get the effective value. 0 - Only DOAIS is applicable for select value -- Default 1 - DOAISE & DOAIS are combine for select value [DOAISE_DOAIS] 1_00 - 7 clock periods 1_01 - 8 clock periods 1_10 - 9 clock periods 1_11 - 10 clock periods Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
4:3	3h	RW	Data On Active Interval Select (DOAIS) Select of active time of SoundWire data buffer after having been enabled. This value affects tOH_Selftimed(min) and that in turn affects tZD(max). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. 00 - 3 clock periods 01 - 4 clock periods 10 - 5 clock periods 11 - 6 clock periods - Default Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
2	0h	RW	Data On Delay Select Extension (DODSE) Delay select for turning on SoundWire Data buffer, tZD(min). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. This register combine with DODS to get the effective value. 0 - Only DODS is applicable for select value 1 - DODSE & DODS are combine for select value [DODSE_DODS] 1_1 - 6 clock periods 1_0 - 5 clock periods Note that due to synchronizer uncertainty, the effective delay may result in either the programmed count or the programmed count minus 1 Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
1	1h	RW	Data On Delay Select (DODS) Delay select for turning on SoundWire Data buffer, tZD(min). Granularity is in number of clock periods of SoC retimer clock to ACIO block e.g. 384 Mhz. 0 - 3 clock periods 1 - 4 clock periods - Default Note that due to synchronizer uncertainty, the effective delay may result in either the programmed count or the programmed count minus 1 Note that total max clock periods of DODSE2&DODSE&DODS + DOAISE2&DOAISE&DOAIS setting shall not be > 20.
0	0h	RW	Data AC Timing Qualifier Enable (DACTQE) This register bit controls the AC timing qualifier for SoundWire Data Buffer Enable. '0' state on this register bit disables the qualifier, allowing the Manager IP's raw data enable to flow through as is. This setting is expected to be used for PHY test mode - Default '1' state on this register bit enables the qualifier to shape the effective data enable signal for conformance to synchronous AC timings such as minimum turn on delay, minimum hold time, and maximum turn off delay on the bus. This setting is expected to be used for Manager IP normal operation where SoundWire Clock is running.